SPECIFICATIONS
•
107
Chapter 9
Reset Characteristics (Patch Mode only)
Total reset time
50 µs ± 10%. This includes:
integrator reset 10 µs
differentiator reset 30 µs
other overhead 10 µs
Time between resets (T
BR
)
For DC currents: T
BR
= 10/(I
DC
- I
BIAS
)
where I
DC
and I
BIAS
are in pA and T
BR
is in seconds.
I
BIAS
is typically 0.3 - 1.0 pA.
For transient currents: A reset will occur if the headstage must deliver more than 10 pC of
charge to the membrane. For example, a 60 mV step imposed on a 200 pF bilayer
membrane will cause a reset (12 pC of charge needed) whereas a 40 mV step will not (8 pC
of charge needed).
Reset transients in current waveform at Scaled Output (typical)
100 Hz bandwidth ± 0.25pA
1 kHz ± 0.5 pA
10 kHz ± 2 pA
Current Clamp
The current clamp mode has two speed settings: I-CLAMP NORMAL and I-CLAMP
FAST. I-CLAMP NORMAL is for use with electrode resistances greater than 1 MΩ.
I-CLAMP FAST is for use with pipette resistances greater than 10 MΩ. (The speed in I=0
mode is the same as in I-CLAMP NORMAL. In addition, TRACK mode is a slow clamp to
zero current.) Note that series resistance compensation remains active in current clamp
mode, allowing measurement of pipette resistance and (when R
s
is compensated) accurate
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