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Bailey IMFEC11 - Communication Circuitry (IMFEC11 Only); Firmware Revision Level Requirements

Bailey IMFEC11
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DESCRIPTION AND OPERATION
FUNCTIONAL OPERATION
WBPEEUI240756A0 2 - 7
Communication Circuitry (IMFEC11 only)
The IMFEC11 module can use FSK digital communication in
the field bus mode or point-to-point mode. When the micropro-
cessor enables the FSK receive gate, digital signals from an
FSK style smart transmitter enter the FSK communication cir-
cuitry. Table 2-1 lists the minimum firmware requirements for
FSK communications. Figure 2-5 shows the decoding logic
which presents a nine-bit digital word to the microprocessor.
The microprocessor reads the incoming communication at a
rate of 9600 baud.
To transmit, the microprocessor enables the FSK transmit
gate. The microprocessor transmits a digital signal that passes
through encoding logic to an oscillator circuit. A digital value
on the input of the oscillator causes it to transmit a keyed fre-
quency. As the digital input to the oscillator changes its state,
the oscillator shifts its output frequency to represent that new
state. For example, the oscillator outputs a frequency of 19
kilohertz when its input is a logic one. It outputs a frequency of
30.5 kilohertz when its input is a logic zero.
Table 2-1. Firmware Revision
Level Requirements
Device Revision
1
BCN/EQN A16
IMFEC11/12 A15
IMMFC03 L.1
IMMFC04 F.1
IMMFC05 E.1
IMMFP01/02 E.1
IMMFP03/03B E.1
PTS A11
AVS/EQS A.0
SM, XM, XE X.11
SmartLink 1.0
STT02
2
D10
STT02 C11
STT03 E10
TBN480 A10
TBN580/581 B11
NOTES:
1. Firmware revision levels that are higher than those
listed also support FSK communications.
2. STT02
/
3
models include the E, F and S mod-
els. These are English, French and Spanish versions.

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