RM23712 TPS
27
Logic level low (power supply ON)
Logic level high (power supply OFF)
Source current, V
pson
=low
Power up delay: T
pson on delay
3.2.4.2 Power OK (PG or PWOK) Output Signal
PWOK is a power good signal and shall be pulled HIGH by the power supply to indicate that all
outputs are within regulation limits. When any output voltage falls below regulation limits, an internal
failure or when AC power has been removed for a time sufficiently long, so that power supply
operation is no longer guaranteed, PWOK will be de-asserted to a LOW state. The start of the
PWOK delay time shall inhibited as long as any power supply output is in current limit.
See Table 21.
Table 28.PWOK signal characteristics
Open collector/drain output from power supply.
Pull-up to +3.3V located in the power supply.
Logic level low voltage, I
sink
=4mA
Logic level high voltage,
I
source
=200μA
Source current, PWOK =high
Power down delay: T
pwok_off
3.2.4.3 SMBAlert
#
(PSAlert) Output Signal Pin
This signal indicates that the power supply is experiencing a problem that the user should
investigate. This shall be asserted due to Critical events or Warning events. The signal shall
activate in the case of critical component temperature reached a warning threshold, general failure,
over-current, over-voltage, under-voltage, failed fan. This signal may also indicate the power supply
is reaching its end of life or is operating in an environment exceeding the specified limits.
This signal is to be asserted in parallel with LED turning solid amber or blinking amber/green.