CMOSTEK CMT2300A - Page 16

CMT2300A
Rev 1.0 | Page16/46
www.cmostek.com
10
SDIO
IO
SDIO
din
pd_din
dout
pd_dout
Data tristate
pd_din default value is “0”
pd_dout default value is “1”
VDD
SPI data input and output
11
CSB
I
CSB
Buffer
VDD
SPI chip selection bar for register access,
active low
12
FCSB
I
FCSB
Buffer
VDD
SPI chip selection bar for FIFO access,
active low
13
XI
I
Crystal circuit input
14
XO
O
Crystal circuit output
15
[1]
GPIO2
IO
GPIO2
din
pd_din
dout
pd_dout
Data tristate
pd_din default value is “1”
pd_dout default value is “0”
VDD
Configured as INT1, INT2, DOUT/DIN,
DCLK (TX/RX) and RF_SWT
16
[1]
GPIO1
IO
GPIO1
din
pd_din
dout
pd_dout
Data tristate
pd_din default value is “1”
pd_dout default value is “0”
VDD
Configured as DOUT/DIN, INT1, INT2,
DCLK (TX/RX) and RF_SWT
17
GND
I
Analog GND. It must be grounded.
Note:
[1]. INT1 and INT2 are interrupts. DOUT is demodulated output. DIN is a modulation input. DCLK is a modulation or
demodulation data rate synchronization clock, automatic switching in TX/RX mode.