12.2 Related Register
12.2.1 EEADR and EEADRH Register
The EEADR and EEADRH registers can address up to 128 bytes of program EEPROM or up to 4K bytes
of program memory.
When the program memory address value is selected, the high byte of the address is written into the
EEADRH register and the low byte is written into the EEADR register. When the program EEPROM address
value is selected, only the low byte of the address is written into the EEADR register.
12.2.2 EECON1 and EECON2 Register
EECON1 is the control register to access the program EEPROM.
The control bit EEPGD determines whether to access program memory or program EEPROM. When this
bit is cleared, as with reset, any subsequent operations will be performed on the program EEPROM. When
this bit is set to 1, any subsequent operations will be performed on the program memory. Program memory is
read-only.
The control bits RD and WR start reading and writing respectively. Software can only set these bits to 1
and cannot be cleared. After the read or write operation is completed, they are cleared by hardware. Since
the WR bit cannot be cleared by software, it can be used to avoid accidentally terminating write operations
prematurely.
-When WREN is set to 1, the program EEPROM is allowed to be written. When power is on, the WREN
bit is cleared. When the normal write operation is LVR reset or WDT timeout reset interrupt, the WRERR bit
will be set to 1. In these cases, after reset, the user can check the WRERR bit and rewrite the corresponding
unit.
-When the write operation is completed, the interrupt flag bit EEIF in the PIR1 register is set to 1. This
flag bit must be cleared by software.
EECON2 is not a physical register. Reading result of EECON2 is all 0.
The EECON2 register is only used when executing the program EEPROM write sequence.
EEPROM data register EEDAT (8EH)
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