Control Techniques UD53

UD53 User Guide
Issue code: 53nu3
17
48 40
16.08
Simulated-
encoder F/D
output
enable
Resolver SIN and
COS inputs
Simulated-encoder
outputs
49
50
51
Decoder
16.09
Resolver
phase offset
16.05
Resolver
phasing test
16.02
Resolver
RPM
16.03
Resolver
position
16.07
Simulated-encoder
output scaling
1
2
[16.07]
41
43
44
46
47
16.12
Simulated-
encoder Z
marker-pulse
outputs
synchronization
disable
16.13
Simulated-encoder Z
marker-pulse outputs
synchronization
inactive
indicator
Synchronization
control logic
Figure 6 Logic diagram for the UD53