Curtiss-Wright GT200 - GT200 Block Diagram

OPERATION
4.3 GT200 Block Diagram
INT_BUF
NET_STAT
RX_FIFO
RC_CTRL
RW_FIFO
RX_CTRL
MEM_CTRL
RT_FIFO
TX_CTRL
RAM
TXN_FIFO
TXM_FIFO
XCVR
XCVR
PCI Interface
Figure 4-3 GT200 Block Diagram
4.3.1 Network Logic
XVCR ........................................SFP 2.5 Gbps fiber optic transceiver.
RX_CTRL..................................Receive control logic. Decodes receive framing protocol
RT_FIFO....................................Retransmit FIFO. Buffers retransmitted link data
TXN_FIFO.................................Transmit to Network FIFO. Buffers network transmit
data
TX_CTRL..................................Transmit control logic. Handles transmit framing
protocol
4.3.2 Host Logic
INT_BUF ...................................Network to Host Interrupt Queue. Buffers received
network interrupts
NET_STAT................................Network Status Look Up Table
RX_FIFO ...................................Receive FIFO. Buffers received data
MEM_CTRL..............................Memory Controller
RAM ..........................................Memory. 125 MHz 32-bit DDR SDRAM
TXM_FIFO................................Transmit to Memory FIFO. Buffers transmit data
RW_FIFO ..................................Read/Write FIFO
RC_CTRL..................................Read Cache Controller
Copyright 2005 4-8 GT200 Hardware Reference