Cypress CY8CKIT-059 PSoC 5LP Prototyping Kit - Page 25

CY8CKIT-059 PSoC® 5LP Prototyping Kit Guide, Doc. #: 001-96498 Rev. *G 25
Hardware
Table 4-1. J1 Header Pin Details Table 4-2. J2 Header Pin Details
PSoC 5LP Prototyping Kit GPIO Header (J1)
Pin Signal Description
J1_01 P2.0 GPIO
J1_02 P2.1 GPIO/LED
J1_03 P2.2 GPIO/SW
J1_04 P2.3 GPIO
J1_05 P2.4 GPIO
J1_06 P2.5 GPIO
J1_07 P2.6 GPIO
J1_08 P2.7 GPIO
J1_09 P12.7 GPIO/UART_TX
J1_10 P12.6 GPIO/UART_RX
J1_11 P12.5 GPIO
J1_12 P12.4 GPIO
J1_13 P12.3 GPIO
J1_14 P12.2 GPIO
J1_15 P12.1 GPIO/I2C_SDA
J1_16 P12.0 GPIO/I2C_SCL
J1_17 P1.0 GPIO
J1_18 P1.1 GPIO
J1_19 P1.2 GPIO
J1_20 P1.3 GPIO
J1_21 P1.4 GPIO
J1_22 P1.5 GPIO
J1_23 P1.6 GPIO
J1_24 P1.7 GPIO
J1_25 GND Ground
J1_26 VDDIO Power
PSoC 5LP Prototyping Kit GPIO Header (J2)
Pin Signal Description
J2_01 VDD Power
J2_02 GND Ground
J2_03 RESET Reset
J2_04 P0.7 GPIO
J2_05 P0.6 GPIO
J2_06 P0.5 GPIO
J2_07 P0.4 GPIO/BYPASS CAP
J2_08 P0.3 GPIO/BYPASS CAP
J2_09 P0.2 GPIO/BYPASS CAP
J2_10 P0.1 GPIO
J2_11 P0.0 GPIO
J2_12 P15.5 GPIO
J2_13 P15.4 GPIO/CMOD
J2_14 P15.3 GPIO/XTAL_IN
J2_15 P15.2 GPIO/XTAL_OUT
J2_16 P15.1 GPIO
J2_17 P15.0 GPIO
J2_18 P3.7 GPIO
J2_19 P3.6 GPIO
J2_20 P3.5 GPIO
J2_21 P3.4 GPIO
J2_22 P3.3 GPIO
J2_23 P3.2 GPIO/BYPASS CAP
J2_24 P3.1 GPIO
J2_25 P3.0 GPIO
J2_26 GND Ground