Cypress EZ-USB FX3 SDK - Page 51

Cypress EZ-USB® FX3™ SDK Quick Start Guide, Version 1.3.1 51
Figure 7-7: CSI-2 Input Parameters
The Image Sensor PCLK value is computed based upon the H-Active, H-
Blanking, V-Active, V-Blanking, Data format and Frame Rate fields.
The CSI Clock frequency and the Data Lane entries along with the frame
properties are used to compute the total input data throughput on the CSI-2
interface which needs to be output on the parallel interface to the GPIFII.
In general, the Image Sensor PCLK value should not exceed 100 MHz.
5. Computing the CX3 MIPI CSI-2 Interface Configuration
The first field for the CX3 MIPI CSI-2 interface configuration is for the REFCLK
frequency being provided to the block. This value along with the Pre Divider
Value, PLL Out Range and Multiplier of Unit Clock are used to generate the
pllPRD, pllFbd and pllFrs parameters which provide the PLL_CLK frequency
using the equation listed in Section 7.2.3 above.
Figure 7-8: CSI-2 Interface Configuration Parameters