CP-850FX Service Manual
Europe R&D
27
4.3.3 PINNING
Pin No. Pin Name I/O Description Remarks
1 Y6 I Picture bus Luma
2 Y7 I Picture bus Luma (MSB)
3 656EN I Enable 656 input mode
4 LLC2 I System clock input
5 HS I Horizontal Sync Input
6 VS I Vertical Sync Input
7 FREQSEL I Selection of H-Drive Frequency Range
8 CM1 I Clock select 1
9 CM0 I Clock select 0
10 VS2 I Additionnal VSYNC input
11 XTAL2 O Analog Crystal Output
12 XTAL1 I Analog Crystal Input
13 NC
14 GNDP S Ground, Output Pin Driver
15 VSUPP S Supply voltage, Output Pin Driver
16 FIFORRD O FIFO Read Counter Reset
17 FIFORD O FIFO Read Enable
18 FIFOWR O FIFO Write Enable
19 FIFORWR O FIFO Write Counter Reset
20 PWM1 O I
2
C controlled DAC
21 PWM2 O I
2
C controlled DAC / Tilt output
22 PWMV O I
2
C controlled DAC
23 HOUT O Horizontal drive output
24 VSTBY S Standby supply voltage, Hout generation
25 DFVBL O
Dynamic focus blanking / horizontal DAF
pulse
26 HSYNC O Horizontal sync output
27 VSYNC O Vertical sync output
28 NC
29 ASG1 S Analog Shield Ground
30 HFBL I Horizontal flyback input
31 SAFETY I Safety input
32 VPROT I Vertical protection input
33 RSW2 O Range Switch2, measurement ADC
34 RSW1 I/O Range Switch1, measurement ADC
35 SENSE I Sense ADC input
36 GNDM S Ground, MADC input
37 VERT+ O Differential Vertical Sawtooth Output
38 VERT- O Differential Vertical Sawtooth Output
39 EW O East / West Correction Output
40 NC
41 SVM O Scan Velocity Modulator
42 ROUT O Analog Output Red
43 GOUT O Analog Output Green
44 BUT O Analog Output Blue
45 GNDO S Ground, analog Back End
46 XREF I Reference Input for RGB DAC’s
47 VSUPO S Supply voltage, Analog Back End
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