Dectris PILATUS - Appendix; Table of Figures

User_Manual-PILATUS-V1_2.doc 57/57
14 Appendix
14.1 Table of figures
Figure 1 Overview of the PILATUS detector system setup..............................8
Figure 2 Principle of direct detection................................................................9
Figure 3 The detector module, the basic element of all DECTRIS detector
systems............................................................................................................9
Figure 4 Block diagramm of the CMOS chip..................................................10
Figure 5 Normal operation with TVX and Camserver on one computer.........11
Figure 6 Operation with TVX and Camserver on separate computers...........11
Figure 7 TVX communication scheme ...........................................................12
Figure 8. TVX control and analysis layout schematic....................................12
Figure 9 Shell showing the active path and the runtvx command..................15
Figure 10 Screen after runtvx has initialized the detector and opened the
Camserver and TVX window..........................................................................15
Figure 11 Relevant directories and folders. ...................................................16
Figure 12 The ‘menu’ of TVX.........................................................................18
Figure 13 Example of a the butterfly selection tool ........................................24
Figure 14 Timing diagramm...........................................................................32
Figure 15. Block diagramm of the CMOS read out chip with high lighted 6 bit
latch ...............................................................................................................36
Figure 16 Result of the Vcmp scan................................................................38
Figure 17 Result of the Vtrm scan..................................................................39
Figure 18 Result of the trimbit scan ...............................................................39
Figure 19 Distribution of the trimbit settings...................................................40
Figure 20 Value of Vcomp (x) for a specified energy .....................................42
Figure 21: Block diagramm of the CMOS Chip with high lighted analog
amplifier .........................................................................................................43
Figure 22 Step response at various Vrf settings ............................................44
Figure 23 Calibration curves for different amplifier settings Vrf......................44
Figure 24. Oscilloscope trace of an external trigger. See text......................53
Figure 25. Delay and jitter..............................................................................53
Figure 26. Oscilloscope image of an external enable. ..................................55
Figure 27. Oscilloscope trace of the typical delay between enable signal and
exposure........................................................................................................55
Figure 28. Osciloscope image of the multiple exposure mode......................56