Denon AVR-1723 - Page 68

68
DDC_CLK/DDC_DATA/TMDS : Check items (16)/(18)
Timing waveform illustration from the start of +3V3H to when reset is released
:
Check items (21)
0.9V
2.48V
TMDS Waveform
DDC_CLK
DDC_DATA
+3V3H
RESET
330ms
Controlled waveform(I2C), when power is turned on : Check items (22)
HSCL
HSDA
POWER ON