Denon AVR-4810CI - Page 25

25
AVR-4810CI/AVR-4810
54
Error message received regarding
firmware data after logging in to
DPMS when rewriting firmware
such as Sub CPU, DSP, FPGA,
and PLD.
Turn the power off then back on.
Updating starts automatically.
Carry out the update in an environment
that has little network load.
55
When rewriting firmware such as
Sub CPU, DSP, FPGA, and PLD,
request was made for firmware
data after logging in to DPMS, but
it timed out.
Turn the power off then back on.
Updating starts automatically.
Carry out the update in an environment
that has little network load.
56
Failure to download firmware after
logging in to DPMS when rewriting
firmware such as Sub CPU, DSP,
FPGA, and PLD.
Turn the power off then back on.
Updating starts automatically.
Carry out the update in an environment
that has little network load.
57
Firmware download error received
(line congestion) after logging in to
DPMS when rewriting firmware
such as Sub CPU, DSP, FPGA,
and PLD.
Turn the power off then back on.
Updating starts automatically.
Carry out the update in an environment
that has little network load.
58
Firmware download error received
(connection failure) after logging in
to DPMS when rewriting firmware
such as Sub CPU, DSP, FPGA,
and PLD.
Turn the power off then back on.
Updating starts automatically.
Carry out the update in an environment
that has little network load.
5A
NACK received when “C” com-
mand sent to Sub CPU, DSP,
FPGA, PLD etc.
Turn the power off then back on.
Updating starts automatically.
5B
NACK received when “L” com-
mand sent to Sub CPU, DSP,
FPGA, PLD etc.
Turn the power off then back on.
Updating starts automatically.
5C
Sub CPU, DSP, FPGA, PLD etc.
failed to receive firmware for
rewriting sent from DM870 (when
timed out).
Turn the power off then back on.
Updating starts automatically.
5D
Sub CPU, DSP, FPGA, PLD etc.
failed to receive firmware for
rewriting sent from DM870 (when
an error).
Turn the power off then back on.
Updating starts automatically.
5E
Invalid data in firmware such as
Sub CPU, DSP, FPGA, and PLD
for rewriting sent from DM870
(when a Check Sum error).
Turn the power off then back on.
Updating starts automatically.
5F
Invalid data in firmware such as
Sub CPU, DSP, FPGA, and PLD
for rewriting sent from DM870
(invalid data received).
Turn the power off then back on.
Updating starts automatically.
60
NACK received when “P” com-
mand sent to Sub CPU, DSP,
FPGA, PLD etc.
Turn the power off then back on.
Updating starts automatically.
61
NACK received when “I” command
sent to Sub CPU, DSP, FPGA,
PLD etc.
Turn the power off then back on.
Updating starts automatically.
62 Failure to start up Sub-µcom.
Turn the power off then back on.
Updating starts automatically.
80
Failure to acquire serial flash data
and before deleting serial flash.
Turn the power off then back on.
Updating starts automatically.
Error
code
Details of Error code Display Coping strategies
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C
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mi n
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pda t i ng f a i l 5B
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mi n
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pda t i ng f a i l 5C
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mi n
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pda t i ng f a i l 5D
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mi n
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pda t i ng f a i l 5E
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mi n
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pda t i ng f a i l 5F
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mi n
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pda t i ng f a i l 60
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mi n
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pda t eCheckNG 61
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pda t i ng f a i l 62
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