44
DN-S1200
201 PD8 JOGA1 I Deck1 A aspect input Input for pulse width measurement
202 PD7 CD_LIMIT I General-purpose port CD Limit detection SW input (detect=L)
203 PD6 DISCI_DET I General-purpose port CD Disk In detection output (detect=L)
204 VCC VCC P Power supply for in Digital +1.2V
205 PD5 JOGB1 I Deck1 B aspect input Input for pulse number count
206 VSS VSS G Digital GND
207 PVSS PVSS G GND for I/O Digital GND
208 PD4 JOGA1 I Deck1 A aspect input Input for pulse number count
209 PVCC PVCC P Power supply for I/O Digital +3.3V
210 PD3 SC2 O General-purpose port Clock output of three Deck1/2 common aspects
211 PD2 SC1 O General-purpose port Clock output of three Deck1/2 common aspects
212 PD1 SC0 O General-purpose port Clock output of three Deck1/2 common aspects
213 PD0 BLINK O BLINK signal output Generate the BLINK output in MTU2.
214 D15 SHDB15 O D15 SDRAM/FLASH D15
215 D14 SHDB14 O D14 SDRAM/FLASH D14
216 PVSS PVSS G GND for I/O Digital GND
217 D13 SHDB13 O D13 SDRAM/FLASH D13
218 PVCC PVCC P Power supply for I/O Digital +3.3V
219 D12 SHDB12 O D12 SDRAM/FLASH D12
220 D11 SHDB11 O D11 SDRAM/FLASH D11
221 D10 SHDB10 O D10 SDRAM/FLASH D10
222 D9 SHDB9 O D9 SDRAM/FLASH D9
223 D8 SHDB8 O D8 SDRAM/FLASH D8
224 VCC VCC P Power supply for in Digital +1.2V
225 D7 SHDB7 O D7 SDRAM/FLASH D7
226 VSS VSS G Digital GND
227 PVSS PVSS G GND for I/O Digital GND
228 D6 SHDB6 O D6 SDRAM/FLASH D6
229 PVCC PVCC P Power supply for I/O Digital +3.3V
230 D5 SHDB5 O D5 SDRAM/FLASH D5
231 D4 SHDB4 O D4 SDRAM/FLASH D4
232 D3 SHDB3 O D3 SDRAM/FLASH D3
233 D2 SHDB2 O D2 SDRAM/FLASH D2
234 D1 SHDB1 O D1 SDRAM/FLASH D1
235 D0 SHDB0 O D0 SDRAM/FLASH D0
236 PVSS PVSS G GND for I/O Digital GND
237 PVCC PVCC P Power supply for I/O Digital +3.3V
238 RD/WR SHRW O RD/WR SDRAM /WE
239 CKE CKE O Clock is enable SDRAM CKE
240 PC11 MEAS O General-purpose port B6TS mode setup(H:measure/L:setup)
Pin No. Pin Name Symble I/O Function
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