Denon DN-S1200 - Page 47

47
DN-S1200
29 TDO TDO_A OZ - Test Data Out
30 VSS GND
31 DVDD PWR 3.3V
32 /EMU[0] EMU0 IO PU Emulation Pin 0
33 CVDD PWR 1.2V
34 /EMU[1] EMU1 IO PU Emulation Pin 1
35 TCK TCK_A I - Test Clock
36 VSS GND
37 EM_CAS ASDCAS O - SDRAM Column Address Strobe
38 EM_WE ASDWE O - SDRAM Write Enable
39 EM_WE_DQM[0] ASDQM0 O - Write Enable or Byte Enable for EM_D[7:0]
40 VSS GND
41 EM_D[7] AEMD7 IO - EMIF Data Bus [Lower 16 Bits]
42 DVDD PWR 3.3V
43 EM_D[6] AEMD6 IO - EMIF Data Bus [Lower 16 Bits]
44 CVDD PWR 1.2V
45 EM_D[5] AEMD5 IO - EMIF Data Bus [Lower 16 Bits]
46 EM_D[4] AEMD4 IO - EMIF Data Bus [Lower 16 Bits]
47 VSS GND
48 EM_D[3] AEMD3 IO - EMIF Data Bus [Lower 16 Bits]
49 EM_D[2] AEMD2 IO - EMIF Data Bus [Lower 16 Bits]
50 DVDD PWR 3.3V
51 EM_D[1] AEMD1 IO - EMIF Data Bus [Lower 16 Bits]
52 EM_D[0] AEMD0 IO - EMIF Data Bus [Lower 16 Bits]
53 CVDD PWR 1.2V
54 VSS GND
55 EM_D[15] AEMD15 IO - EMIF Data Bus [Lower 16 Bits]
56 EM_D[14] AEMD14 IO - EMIF Data Bus [Lower 16 Bits]
57 CVDD PWR 1.2V
58 EM_D[13] AEMD13 IO - EMIF Data Bus [Lower 16 Bits]
59 EM_D[12] AEMD12 IO - EMIF Data Bus [Lower 16 Bits]
60 DVDD PWR 3.3V
61 EM_D[11] AEMD11 IO - EMIF Data Bus [Lower 16 Bits]
62 VSS GND
63 EM_D[10] AEMD10 IO - EMIF Data Bus [Lower 16 Bits]
64 EM_D[9] AEMD9 IO - EMIF Data Bus [Lower 16 Bits]
65 CVDD PWR 1.2V
66 EM_D[8] AEMD8 IO - EMIF Data Bus [Lower 16 Bits]
67 EM_WE_DQM ASDQM1 O - Write Enable or Byte Enable for EM_D[15:8]
68 DVDD PWR 3.3V
69 VSS GND
70 EM_CLK ASDCLK O - SDRAM Clock
71 EM_CKE ASDCKE O - SDRAM Clock Enable
72 VSS GND
73 DVDD PWR 3.3V
74 EM_A[11] AEMA11 O - EMIF Address Bus
75 EM_A[9] AEMA9 O - EMIF Address Bus
76 EM_A[8] AEMA8 O - EMIF Address Bus
77 CVDD PWR 1.2V
78 VSS GND
79 EM_A[7] AEMA7 O - EMIF Address Bus
80 EM_A[6] AEMA6 O - EMIF Address Bus
81 DVDD PWR 3.3V
82 VSS GND
83 EM_A[5] AEMA5 O - EMIF Address Bus
84 EM_A[4] AEMA4 O - EMIF Address Bus
85 CVDD PWR 1.2V
86 EM_A[3] AEMA3 O - EMIF Address Bus
87 VSS GND
88 EM_A[2] AEMA2 O - EMIF Address Bus
89 EM_A[1] AEMA1 O - EMIF Address Bus
90 CVDD PWR 1.2V
91 EM_A[0] AEMA0 O - EMIF Address Bus
92 DVDD PWR 3.3V
93 EM_A[10] AEMA10 O - EMIF Address Bus
94 EM_BA[1] AEMB1 O -
SDRAM Bank Address and Asynchronous Memory Low-Order Address
95 VSS GND
96 EM_BA[0] AEMB0 O -
SDRAM Bank Address and Asynchronous Memory Low-Order Address
97 EM_CS[0] ASDCE O - SDRAM Chip Select
98 EM_RAS ASDRAS O - SDRAM Row Address Strobe
99 VSS GND
100 EM_CS[2] O NC Asynchronous Memory Chip Select
101 CVDD PWR 1.2V
102 EM_RW O NC Open
pin Pin name Symble TYPE Ext DESCRIPTION