71
Pin
No
Port Name Port Name I/O
Status
Note
Pull-up/
down
init. stby Act.
20 TXD0 USB_TX/UPDATE TX O L L - send command to bolero IC
21 RXD0 USB_RX/UPDATE RX I - - - receive data from bolero IC
22 PE2 SP_ON O L L H speaker on/off control (AMP B'D Q710-E)
23 TXD1 DAB_TX O L L - send command to DAB Module
24 RXD1 DAB_RX I - - - receive data from DAB Module
25 PE6 DAC_RST O Pull-down L L - AK4385 DAC reset
26 PG0 DAC_CS O Pull-down L L - AK4385 DAC chip select
27 PG1 DAC_CLK O Pull-down L L - AK4385 DAC clock
28 PG2 DAC_CDTI O Pull-down L L - AK4385 DAC data
29 PB3 - O OPEN
30 BOOT single boot mode I Pull-up - H L update mode select
31 PH1/TB0IN0 - O OPEN
32 PH2/TB1IN0 - O OPEN
33 TXD2 iPodDock_TX O L L - used when connect with iPod uart data out
34 RXD2 iPodDocK_RX I - - - used when connect with iPod uart data in
35 PF2 F_V_CS O L L L function IC strobe (NJW11153)
36 PH3 F_V_CLK O L L - function IC clock (NJW11153)
37 PB4 F_V_DATA O L L - function IC data (NJW11153)
38 PI0/TB0OUT - O OPEN
39 PJ6/INT6 - O OPEN
40 PI1/TB1OUT - O OPEN
41 PB5 - O OPEN
42 PI2/TB2OUT - O OPEN
43 PB6 BOL_RST O L L L Bolero (IC41) Reset
44 PF4 TU_SDA I/O Pull-up L L - tuner PLL IC data
45 PF5 TU_SCL O Pull-up L L - tuner PLL IC clock
46 PF6 TUNED I Pull-up - - L tuned in
47 PB7 STEREO I Pull-up - - L stereo in
48 PI3 RDS_DATA I Pull-down - - - RDS data
49 INT1 RDS_CLK I Pull-down - - - RDS clock
50 PK0 CD_BUS2 I - - - receive data from CD DSP (Oasis (64)pin OUT)
51 PK1 CD_BUS3 O L L - send command to CD DSP (Oasis (65)pin IN)
52 PI4 CD_BUCK O L L - communication clock with CD DSP
53 PI5 CD_CCE O L L - communication chip enable with CD DSP
54 PB0/TDO/SWV O Pull-up for DEBUG
55 PA0/TMS/SWDIO O Pull-up for DEBUG
56 PA1/TCK/SWCLK O Pull-down for DEBUG
57 TEST3 TEST pin, Set to OPEN.
58 PJ7 CD_DSP_RST O L L L CD DSP reset
59 PB1/TDI O Pull-up for DEBUG
60 PB2/TRST O Pull-up for DEBUG
61 PF3/RXIN1 - O OPEN
62 DVCC P Power supply pin
63 DVSS G GND pin
64 PA2 LED_RED O H H L TIMER ST LED(RED) Control ”L";ON
65 PA3 LED_GREEN O H H L Power LED (GRREN) Control "L";ON
66 PA4 VFD_RST O L L L vfd reset
67 PA5 VFD_DI O L L - vfd data
68 PA6 VFD_CS O L L L vfd chip select
69 PA7 VFD_CLK O L L - vfd clock
70 INT0 EX_INTERRUT I Pull-up - H L External Interrupt (For Key detection)
71 CVCC P Power supply pin
72 X2 oscillator(10MHz) high-speed oscillator(Output)
73 CVSS G GND pin
74 X1 oscillator(10MHz) high-speed oscillator(Input)
75 REGVSS GND pin G GND pin
76 REGVCC P Power supply pin
77 XT1 RTC oscillator(32.768KHz) low-speed oscillator(Input)
78 XT2 RTC oscillator(32.768KHz) low-speed oscillator(Output)
79 PI6/TB4IN0 - O OPEN
80 NMI P 3.3V Non-maskable interrupt
81 MODE G GND
82 RESET Reset input pin I I L MCU RESET
83 PI7 EEPROM_SCL O Pull-up L - - EEPROM clock
84 PH6 EEPROM_SDA I/O Pull-up L - - EEPROM data