70
S-301
Terminal Functions
TERMINAL
NAME PIN
I/O DESCRIPTIONS
1 Left and right clock (f
s
) input for PCM-format operation. WDCK clock input in external DF mode.
Connected to ground in DSD mode
(1)
AGNDF 9 – Analog ground (DACFF)
AGNDL 19 – Analog ground (L-channel I/V)
AGNDR 11 – Analog ground (R-channel I/V)
DBCK 4 I Bit clock input for DSD mode. Connected to ground in PCM mode
(1)
DGND 8 – Digitalground
DSDL 25 I L-channel data input for DSD mode and external DF mode
(1)
DSDR 24 I R-channel data input for DSD mode and external DF mode
(1)
MC 27 I Mode control clock input
(1)
MDI 26 I/O Mode control data input
(2)
MS 28 I/O Mode control chip select
(2)
PBCK 2 I
I
Bit clock input for PCM mode. Connected to GND for DSD mode
(1)
PDATA 3 I Serial audio data input for PCM mode
(1)
PLRCK
RST
6 I Reset
(1)
SCK 5 I System clock input
(1)
V
CC
C 15 – Analog power supply (internal bias and current DAC), 5 V
V
CC
F 21 – Analog power supply (DACFF), 5 V
V
CC
L 20 – Analog power supply (L-channel I/V), 5 V
V
CC
R 10 – Analog power supply (R-channel I/V), 5 V
V
COM
14 – Internal bias decoupling pin
V
DD
7 – Digital power supply, 3.3V
V
OUT
L+ 17 O L-channel analog voltage output +
V
OUT
L– 18 O L-channel analog voltage output –
V
OUT
R+ 13 O R-channel analog voltage output +
V
OUT
R– 12 O R-channel analog voltage output –
ZEROL 23 O Zero flag for L-channel
ZEROR 22 O Zero flag for R-channel
Notes: (1) Schmitt-trigger input, 5-V tolerant
(2) Schmitt-trigger input and output, 5-V tolerant
AGNDC 16 – Analog ground (internal bias and current DAC)
w
w
w
.
x
i
a
o
y
u
1
6
3
.
c
o
m
Q
Q
3
7
6
3
1
5
1
5
0
9
9
2
8
9
4
2
9
8
T
E
L
1
3
9
4
2
2
9
6
5
1
3
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
TEL 13942296513 QQ 376315150 892498299
TEL 13942296513 QQ 376315150 892498299
http://www.xiaoyu163.com
http://www.xiaoyu163.com
To Next Page
Loading...
