A732-01-880 Issue D
Page 18 © Edwards Limited 2018. All rights reserved.
Operation
Figure 4 - Logic interface schematic
Note: The tolerance of the power supply can be ±10%. Make sure all the unused pins are not connected.
Table 7 - Pin status on the logic interface connector
Mode
Speed
percentage
Pin 1 Pin 3 Pin 4 Pin 5
Normal 100% 24 V Link open open
Boost 116% 24 V Link Link Link
Idle 67% 24 V Link Link open
1. Speed control pins 3, 4 and 5
Maximum current per pin = 7 mA when linked to pin 1 (24 V)
2. Pump healthy signal
Signal high = normal (maximum permissible current = 100 mA)
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