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• PACKAGE
- 28-pin SOP (330mil)
b) General Description
The MX25L1602 is a CMOS 16,777,216 bit serial Flash EEPROM, which is configured as
2,097,152 x 8 internally. The MX25L1602 features a serial peripheral interface and software
protocol allowing operation on a simple 3- wire bus. The three bus signals are a clock input
(SCLK), a serial data input (SI), and a serial data output (SO). SPI access to the device is
enabled by CS input.
The MX25L1602 provide sequential read operation on whole chip. The sequential read
operation is executed on a segment (512 byte) basis. User may start to read from any byte of
the segment. While the end of the segment is reached, the device will wrap around to the
beginning of the segment and continuously outputs data until CS goes high.
After program/erase command is issued, auto program/ erase algorithms which
program/erase and verify the specified page locations will be executed. Program command is
executed on a page (128 bytes) basis, and erase command is executed on both chip and sector
(8K bytes) basis.
To provide user with ease of interface, a status register is included to indicate the status of
the chip. The status read command can be issued to detect completion and error flag status of
a program or erase operation.
When the device is not in operation and CS is high, it is put in standby mode and draws
less than 30uA DC current.
The MX25L1602 utilizes MXIC's proprietary memory cell which reliably stores memory
contents even after 100,000 program and erase cycles.
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