3-41. CmcmT
DESCRIPTION. 'Die
3
kHz drive signal
applied
to terminal 8 of the
Null Detector Assembly is
half-wave rectified to
provide ±6. 8 volt dc operating vol-
tages for
the mill detector
circuitry. Diodes CR3 and
CR4 along
with C17 through Cl9 and
R33
and
R34 form
the
half-wave rectifiers used to
produce the dc operating
voltages.
Synchronous drive voltages for the null
detector
circuitry are provided by
the 84 Hz collector-coupled
multivibrator con^rised of
Q9,
QiO,
Cl4, Cl5, and R23
through
R26. The 84 Hz collector signal of
Q9
is used to
provide the
demodulator drive for
Q8.
Transistor
Qll
si^pltes
an 84 Hz squarewave from its
emitter to tlie gate
of Ql.
This signal is derived from the
collector of QlO
in the 84
Hz multivibrator. Resistor
R27
provides ad-
justment of the squarewave
s%nal amplitude applied to
the gate of Ql.
The collector s^nal of Qll is
coupled by
C5 and C4 to the
output
of Ql
where it is used
to null
out any
spikes internally generated
in
Ql.
Adjustment of
this
corapensatirg signal is provided by
potentiometer
R31 located in
the collector circuit of Qll.
3-42. The resulting
squarewave signal present at
the
junction of
R3 and
Ql
is coupled by
C3 to the input stage
of
the carrier
amplifier.
This
signal is
proportional to
the
difference between any
feedback voltage from the
meter circxiit
and the input voltage at
terminal 2. The
carrier
amplifier is comprised
of four common-emitter
amplifiers of Q2
through
Q5
and complementary
push-
pull
output amplifier Q6 and Q7.
Negative emitter feed-
back
tlurough the network con^osed of
RIO and R15 through
R18,
C8 and
Cll controls the gain of the carrier amp-
lifier
and consequently the
null detector input
impedance.
Variable
resistor
R17
located in
the feedback
circuit
provides
adjustment of this ir^ut
in^edance. The emitter
signal of
Q6 and
Q7
is coupled by
C12 and R20
to
the
synchronous demodulator Q8.
Transistor Q8 is
driven
in
Synchronism with the
chopper
Ql
and Is operated in
the
inverse
mode
to secure minimum saturation
voltage.
The resulting demodulated
s^nal is filtered
by
the low-
pass
filter comprised of
R21
and
Cl3 and applied to ter-
minal 5 for
use in the cptionai
Recorder Output circuitry.
This same
voltage s^nal is applied through
R22 and the
meter circuit to Ql as a
negative feedback signal
to con-
trol the gain of the null
detector. Any current flow
through this network causes a
correspondir^ deflection
on
the meter
proportional
to the magnitude of the
null
detector
input voltage.
3-43. DC INPUT DIVIDER
3-44. GENERAL. Full-scale input voltages to the in-
strument on
either
mode
of cperation
are
reduced to one
millivolt
(±10%
overranging) at the kpik of the null detec-
tor by
the DC Input Divider circuitry.
3-45.
CIRCUir
DESCRIPTION.
The DC Input Divider is
con5)Csed of seven series
connected
resistors
Ri through
R7 that have a total resistance cf 100.
1
megohms. When
the instrument is operated in the TVM mode, the input
impedance
is a
constant 100 megohms on all dc voltage
ranges and the
RANGE
switch is used to select
the desired
tap c£
the divider i^twork. When the instrument
is
oper-
ated on the differential dc mode, the NULL and
RANGE
switches select
^^rious taps on the input divider network
to provide an
input impedance of 10 megohms on tte
.
001
and
.
01
NULL
switch
posttions, and
100
megohms on all
other NULL switch positions.
3-46.
OPTIONAL
RECORDER OUTPUT
3-47. GENERAL,
histruments
containing the
-02
Cption
are
provided with
a
RECORDER OUTPUT that is isolated
from the
null detector circuitry. The Recorder
Output
circuitry is composed of a
modulator and demodulator
separated
by
an
isolation
transformer. Each circuit is
driven at a 3 kHz rate by a
signal
derived from
the Ref-
erence Inverter
Assembly.
3-48. CIRCUIT DESCRIPTION. The dc input voltage
applied to terminal 1 of
the Recorder Output Assembly is
modulated at a 3
kHz
rate by
alternate conduction at
Ql
and Q2.
Conduction of
Ql
and
Q2
is controlled by
the
3
kHz drive s^nal applied to terminal 3. Transformer
T1 couples
the resulting signal to
its
secondary winding
where demodulation is accomplislied by alternate con-
duction of
Q3
and
Q4.
Conduction of
Q3
and
Q4
is con-
trolled by
the
3
kHz drive signal applied to terminal
4.
The resultii^ isolated dc
voltage
is
then filtered by Cl
and
RlO. Variable resistor RiO provides adjustment
of
the
RECORDER OUTPUT voltage.
3-7
893A
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