FTDI LibFT4222 - SPI Master Init

Application Note
AN_329 User Guide For LibFT4222
Version 1.5
Document Reference No.: FT_001060 Clearance No.: FTDI#406
23
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 DUAL SPI Transfer/Receive - Data is transferred out or received in on 2 SPI lines
simultaneously
 QUAD SPI Transfer/Receive – Data is transferred out or received in on 4 SPI lines
simultaneously
Please refer to DS_FT4222H for more details.
For SPI Master Single mode, all data packets are terminated with a zero-length packet. Therefore
after one data packet there will be one SOF then follow by the terminating zero-length packet then
ends with another SOF. As a result, under normal conditions, these two SOF’s will take
approximately 250us.
3.3.1 SPI Master Init
FT4222_STATUS FT4222_SPIMaster_Init(FT_HANDLE ftHandle,
FT4222_SPIMode ioLine, FT4222_SPIClock clock_div,
FT4222_SPICPOL cpol, FT4222_SPICPHA cpha, uint8 ssoMap)
Supported Chip:
FT4222 chip version
Supported
FT4222 Rev A
YES
FT4222 Rev B
YES
FT4222 Rev C
YES
FT4222 Rev D
YES
Summary:
Initialize the FT4222H as an SPI master.
In order to support various types of SPI slave devices, the FT4222H SPI master is configurable
using the following parameters:
 IO lines: SPI transmission lines. The FT4222H SPI supports single, dual, or quad
transmission mode. An application may override this initial selection dynamically using
FT4222_SPIMaster_SetLines. For example, commands might be sent in single mode but
data transferred in dual or quad mode.
 Clock divider: SPI clock rate is subject to system clock. The FT4222H SPI clock could be
1/2, 1/4, 1/8, 1/16, 1/32, 1/64, 1/128, 1/256, or 1/512 system clock rate.
 Clock polarity: Active high or active low.
 Clock phase: Data is sampled on the leading (first) or trailing (second) clock edge.
 Slave selection output pins: Select slave devices by ss0o, ss1o, ss2o, ss3o. The FT4222H
supports active low only.
 There is only one setting stored in the MCU. If there are multi SPI masters to be initialized,
keep all settings the same, including ssoMap.
Please note that the FT4222H has only one SPI controller. Even though the FT4222H provides up
to 4 interfaces for connecting up to 4 SPI slave devices as per Figure 1.4, the 4 slave devices
share the same SPI data bus: MOSI, MISO, and SCK. A user can decide how to map the 4
interfaces to the 4 SS signals (ss0o, ss1o, ss2o and ss3o) by the ssoMap parameter.
The 4 interfaces cannot work simultaneously because there is only one data bus.
Parameters:
ftHandle
Handle of the device.
ioLine
SPI transmission lines:
 SPI_IO_SINGLE
 SPI_IO_DUAL