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Harman Kardon AVR340 - Page 120

Harman Kardon AVR340
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SD_CLK_OUT SDRAM Clock Output
SDRAM clock output. OUTPUT
SD_CLK_IN SDRAM Re-timing Clock Input
SDRAM re-timing clock input. INPUT
SD_CLK_EN SDRAM Clock Enable
SDRAM clock enable. OUTPUT
SD_BA, EXTA19 SDRAM Bank Address Select, SRAM External Address Bus
SDRAM bank address select. SRAM external address bus 19. OUTPUT
SD_CS
SDRAM Chip Select
SDRAM chip select. OUTPUT
SD_RAS
SDRAM Row Address Strobe
SDRAM row address strobe. OUTPUT
SD_CAS
SDRAM Column Address Strobe
SDRAM column address strobe. OUTPUT
SD_WE
SDRAM Write Enable
SDRAM write enable. OUTPUT
SD_DQM1 SDRAM Data Mask 1
SDRAM data mask 1. OUTPUT
SD_DQM0 SDRAM Data Mask 2
SDRAM data mask 0. OUTPUT
NV_CS
,GPIO14 SRAM Chip Select, General Purpose I/O
SRAM/Flash chip select. This pin can act as a general-purpose input or output that can be
individually configured and controlled by DSPC. BIDIRECTIONAL - Default: OUTPUT
NV_OE
,GPIO15 SRAM Output Enable, General Purpose I/O
SRAM/Flash output enable. This pin can act as a general-purpose input or output that can be
individually configured and controlled by DSPC. BIDIRECTIONAL - Default: OUTPUT
AVR340 harman/kardon
120

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