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Rev. 1.71 130 April 11, 2017 Rev. 1.71 131 April 11, 2017
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
RRA [m]
RotateDataMemoryrightwithresultinACC
Description DatainthespeciedDataMemoryandthecarryagarerotatedrightby1bitwithbit0
rotatedintobit7.TherotatedresultisstoredintheAccumulatorandthecontentsofthe
DataMemoryremainunchanged.
Operation ACC.i←[m].(i+1);(i=0~6)
ACC.7←[m].0
Affectedag(s) None
RRC [m]
RotateDataMemoryrightthroughCarry
Description ThecontentsofthespeciedDataMemoryandthecarryagarerotatedrightby1bit.Bit0
replacestheCarrybitandtheoriginalcarryagisrotatedintobit7.
Operation [m].i←[m].(i+1);(i=0~6)
[m].7←C
C←[m].0
Affectedag(s) C
RRCA [m]
RotateDataMemoryrightthroughCarrywithresultinACC
Description DatainthespeciedDataMemoryandthecarryagarerotatedrightby1bit.Bit0replaces
theCarrybitandtheoriginalcarryagisrotatedintobit7.Therotatedresultisstoredinthe
AccumulatorandthecontentsoftheDataMemoryremainunchanged.
Operation ACC.i←[m].(i+1);(i=0~6)
ACC.7←C
C←[m].0
Affectedag(s) C
SBC A,[m]
SubtractDataMemoryfromACCwithCarry
Description ThecontentsofthespeciedDataMemoryandthecomplementofthecarryagare
subtractedfromtheAccumulator.TheresultisstoredintheAccumulator.Notethatifthe
resultofsubtractionisnegative,theCagwillbeclearedto0,otherwiseiftheresultis
positiveorzero,theCagwillbesetto1.
Operation ACC←ACC−[m]−C
Affectedag(s) OV,Z,AC,C
SBCM A,[m]
SubtractDataMemoryfromACCwithCarryandresultinDataMemory
Description ThecontentsofthespeciedDataMemoryandthecomplementofthecarryagare
subtractedfromtheAccumulator.TheresultisstoredintheDataMemory.Notethatifthe
resultofsubtractionisnegative,theCagwillbeclearedto0,otherwiseiftheresultis
positiveorzero,theCagwillbesetto1.
Operation [m]←ACC−[m]−C
Affectedag(s) OV,Z,AC,C
SDZ [m]
SkipifdecrementDataMemoryis0
Description ThecontentsofthespeciedDataMemoryarerstdecrementedby1.Iftheresultis0the
followinginstructionisskipped.Asthisrequirestheinsertionofadummyinstructionwhile
thenextinstructionisfetched,itisatwocycleinstruction.Iftheresultisnot0theprogram
proceedswiththefollowinginstruction.
Operation [m]←[m]−1
Skipif[m]=0
Affectedag(s) None

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