Rev. 1.71 82 April 11, 2017 Rev. 1.71 83 April 11, 2017
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
Capture Input Mode
ToselectthismodebitsST0M1andST0M0intheSTM0C1registershouldbesetto01respectively.
Thismodeenablesexternalsignalstocaptureandstorethepresentvalueoftheinternalcounter
andcanthereforebeusedforapplicationssuchaspulsewidthmeasurements.Theexternalsignalis
suppliedontheSTP0I,whoseactiveedgecanbeeitherarisingedge,afallingedgeorbothrising
andfallingedges;theactiveedgetransitiontypeisselectedusingtheST0IO1andST0IO0bitsin
theSTM0C1register.ThecounterisstartedwhentheST0ONbitchangesfromlowtohighwhichis
initiatedusingtheapplicationprogram.
WhentherequirededgetransitionappearsontheSTP0Ithepresentvalueinthecounterwillbe
latchedintotheCCRAregistersandaSTMinterruptgenerated.Irrespectiveofwhateventsoccuron
theSTP0IthecounterwillcontinuetofreerununtiltheST0ONbitchangesfromhightolow.When
aCCRPcomparematchoccursthecounterwillresetbacktozero;inthiswaytheCCRPvaluecanbe
usedtocontrolthemaximumcountervalue.WhenaCCRPcomparematchoccursfromComparator
P,aSTMinterruptwillalsobegenerated.Countingthenumberofoverowinterruptsignalsfrom
theCCRPcanbeausefulmethodinmeasuringlongpulsewidths.TheST0IO1andST0IO0bitscan
selecttheactivetriggeredgeontheSTP0Itobearisingedge,fallingedgeorbothedgetypes.Ifthe
ST0IO1andST0IO0bitsarebothsethigh,thennocaptureoperationwilltakeplaceirrespectiveof
whathappensontheSTP0I,howeveritmustbenotedthatthecounterwillcontinuetorun.
TheST0CCLRandST0DPXbitsarenotusedinthisMode.
Counter Value
YY
CCRP
ST0ON
ST0PAU
CCRP Int. Flag
STMP0F
CCRA Int. Flag
STMA0F
CCRA
Value
Time
Counter cleared
by CCRP
Pause
Resume
Counter
Reset
ST0M [1:0] = 01
STM capture pin
STP0I
XX
Counter
Stop
ST0IO [1:0]
Value
XX YY XX YY
Active
edge
Active
edge
Active edge
00 – Rising edge 01 – Falling edge 10 – Both edges 11 – Disable Capture
Capture Input Mode
Note:1.ST0M[1:0]=01andactiveedgesetbytheST0IO[1:0]bits
2.ATMCaptureinputpinactiveedgetransfersthecountervaluetoCCRA
3.TheST0CCLRandST0DPXbitsarenotused
4.Nooutputfunction–ST0OCandST0POLbitsarenotused
5.CCRPdeterminesthecountervalueandthecounterhasamaximumcountvaluewhen
CCRPisequaltozero.