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Rev. 1.71 34 April 11, 2017 Rev. 1.71 35 April 11, 2017

HT66F002/HT66F0025/HT66F003/HT66F004

Cost-Effective A/D Flash MCU with EEPROM

HT66F002/HT66F0025/HT66F003/HT66F004

Cost-Effective A/D Flash MCU with EEPROM

Writing Data to the EEPROM

TheEEPROMaddressofthedatatobewrittenmustrstbeplacedintheEEAregisterandthedata

placedintheEEDregister.TowritedatatotheEEPROM,thewriteenablebit,WREN,intheEEC

mustbeimmediatelysethightoinitiateawritecycle.Thesetwoinstructionsmustbeexecuted

consecutively.TheglobalinterruptbitEMIshouldalsorstbeclearedbeforeimplementingany

writeoperations,andthensetagainafterthewritecyclehasstarted.NotethatsettingtheWRbit

highwillnotinitiateawritecycleiftheWRENbithasnotbeenset.AstheEEPROMwritecycleis

controlledusinganinternaltimerwhoseoperationisasynchronoustomicrocontrollersystemclock,

acertaintimewillelapsebeforethedatawillhavebeenwrittenintotheEEPROM.Detectingwhen

thewritecyclehasnishedcanbeimplementedeitherbypollingtheWRbitintheEECregisteror

byusingtheEEPROMinterrupt.Whenthewritecycleterminates,theWRbitwillbeautomatically

clearedtozerobythemicrocontroller,informingtheuserthatthedatahasbeenwrittentothe

EEPROM.TheapplicationprogramcanthereforepolltheWRbittodeterminewhenthewritecycle

hasended.

Write Protection

Protectionagainstinadvertentwriteoperationisprovidedinseveralways.Afterthedevices

arepowered-ontheWriteEnablebitinthecontrolregisterwillbeclearedpreventinganywrite

operations.Alsoatpower-ontheBankPointer,BP,willberesettozero,whichmeansthatData

MemoryBank0willbeselected.AstheEEPROMcontrolregisterislocatedinBank1,thisaddsa

furthermeasureofprotectionagainstspuriouswriteoperations.Duringnormalprogramoperation,

ensuringthattheWriteEnablebitinthecontrolregisterisclearedwillsafeguardagainstincorrect

writeoperations.

EEPROM Interrupt

TheEEPROMwriteinterruptisgeneratedwhenanEEPROMwritecyclehasended.TheEEPROM

interruptmustfirstbeenabledbysettingtheDEEbitintherelevantinterruptregister.Whenan

EEPROMwritecycleends,theDEFrequestagwillbeset.Iftheglobal,EEPROMInterruptare

enabledandthestackisnotfull,asubroutinecalltotheEEPROMInterruptvector,willtakeplace.

WhentheEEPROMInterruptisserviced,theEEPROMInterruptagDEFwillbeautomatically

cleared.TheEMIbitwillalsobeautomaticallyclearedtodisableotherinterrupts.

Holtek HT66F004 User Manual

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