Holtek HT66F004 - A;D Converter Control Registers - SADC0, SADC1, SADC2, PASR, PBSR

Rev. 1.71 98 April 11, 2017 Rev. 1.71 99 April 11, 2017
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
A/D Converter Control Registers – SADC0, SADC1, SADC2, PASR, PBSR
TocontrolthefunctionandoperationoftheA/Dconverter,severalcontrolregistersknownas
SADC0,SADC1andSADC2areprovided.These8-bitregistersdefinefunctionssuchasthe
selectionofwhichanalogchannelisconnectedtotheinternalA/Dconverter,thedigitiseddata
format,theA/DclocksourceaswellascontrollingthestartfunctionandmonitoringtheA/D
converterbusystatus.TheSACS2~SACS0bitsintheSADC0registerareusedtodeterminewhich
externalchannelinputisselectedtobeconverted.TheSAINS2~SAINS0bitsintheSADC1register
areusedtodeterminethattheanalogsignaltobeconvertedcomesfromtheinternalanalogsignal
orexternalanalogchannelinput.IftheSAINS2~SAINS0bitsaresetto“000”,theexternalanalog
channelinputisselectedtobeconvertedandtheSACS2~SACS0bitscandeterminewhichexternal
channelisselectedtobeconverted.IftheSAINS2~SAINS0bitsaresetto“001~011”,theAV
DD

voltageisselectedtobeconverted.IftheSAINS2~SAINS0bitsaresetto“101~111”,theOPA
outputvoltageisselectedtobeconverted.WhenV
REF
orV
BG
isselectedasADCinputorADC
referencevoltage,theOPAneedstobeenabledbysettingENOPAto1.
Notethatwhentheprograms selectexternalsignalandinternalsignalasanADCinputsignal
simultaneously,thenthehardwarewillonlychoosetheinternalsignalasanADCinput.Inaddition,
iftheprogramsselectexternalreferencevoltageV
REF
andtheinternalreferencevoltageV
BG
asADC
referencevoltage,thenthehardwarewillonlychoosetheinternalreferencevoltageV
BG
asanADC
referencevoltageinput.
Thepin-sharedfunctioncontrolregisters,namedPASRandPBSR,containthecorrespondingpin-
sharedselectionbitswhichdeterminewhichpinsonPortAandPortBareusedasanaloginputs
fortheA/DconverterinputandwhichpinsarenottobeusedastheA/Dconverterinput.When
thepinisselectedtobeanA/Dinput,itsoriginalfunctionwhetheritisanI/Oorotherpin-shared
functionwillberemoved.Inaddition,anyinternalpull-highresistorsconnectedtothesepinswillbe
automaticallyremovedifthepinisselectedtobeanA/Dinput.
• SADC0 Register – HT66F002/HT66F0025/HT66F003
Bit 7 6 5 4 3 2 1 0
Name START ADBZ ENADC ADRFS — — SACS1 SACS0
R/W R/W R R/W R/W — — R/W R/W
POR 0 0 0 0 — — 0 0
Bit7 START:StarttheA/Dconversion
0→1→0:StartA/Dconversion
0→1:ResettheA/DconverterandsetADBZto0
1→0:StartA/DconversionandsetADBZto1
Bit6 ADBZ:ADCbusyag
0:A/Dconversionendedornoconversion
1:A/Disbusy
Bit5 ENADC:ADCenable/disablecontrolregister
0:ADCdisable
1:ADCenable
Bit4 ADRFS:A/Doutputdataformatselectionbit
0:ADCoutputdataformat→SADOH=D[11:4];SADOL=D[3:0]
1:ADCoutputdataformat→SADOH=D[11:8];SADOL=D[7:0]
Bit3~2 Unimplemented,readas"0"
Bit1~0 SACS1~SACS0:ADCinputchannelsselection
00:ADCinputchannelcomesfromAN0
01:ADCinputchannelcomesfromAN1
10:ADCinputchannelcomesfromAN2
11:ADCinputchannelcomesfromAN3