HP 8662A Service Manual

8662A Option H25
08862-92039
Page 4 of 17
Table 3-11. DFA Connector Functions
DFA
Input
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20-24
25
Freq.
Bit
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
—
—
Function
Frequency Offset
Frequency Offset
Frequency Offset
Frequency Offset
Frequency Offset
Frequency Offset
Frequency Offset
Frequency Offset
Frequency Offset
Frequency Offset
Frequency Offset
Frequency Offset
Frequency Offset
Frequency Offset
Frequency Offset
Frequency Offset
Frequency Offset
HOPEN
DATSTRB
—
GND
Frequency
Offset
See Table 3-12.
See Table 3-12.
See Table 3-12.
+0.025 MHz
+0.05 MHz
+0.1 MHz
+0.2 MHz
+0.4 MHz
+0.8 MHz
+1.6 MHz
+3.2 MHz
+6.4 MHz
+12.8 MHz
+25.6 MHz
+51.2 MHz
+7.0 MHz
+12.5 MHz
Description
Pos-true (1) CMOS logic level
Pos-true (1) CMOS logic level
Pos-true (1) CMOS logic level
Pos-true (1) CMOS logic level
Pos-true (1) CMOS logic level
Pos-true (1) CMOS logic level
Pos-true (1) CMOS logic level
Pos-true (1) CMOS logic level
Pos-true (1) CMOS logic level
Pos-true (1) CMOS logic level
Pos-true (1) CMOS logic level
Pos-true (1) CMOS logic level
Pos-true (1) CMOS logic level
Pos-true (1) CMOS logic level
Pos-true (1) CMOS logic level
Neg-true (1) TTL logic Level
Neg-true (1) TTL logic Level
Enable fast-hop mode with neg-true (1) TTL logic level
Latches data onto frequency data lines on receipt of
CMOS pos-true (1) edge trigger
Not connected
DFA connector chassis ground |
Table 3-12. Logic Levels Required for Small Frequency Offsets.
DFA
Input Pin
No.
1
2
3
Frequency
Bit
0
1
2
Frequency Offset
-0.01 MHz
-0.005 MHz 0 MHz +0.005 MHz
+0.01 MHz
Logical State (0 = false, 1 = true)
1
1
0
0
0
1
1
0
1
0
1
1
1
1
1
Copyright 1986 - HEWLETT-PACKARD COMPANY - Spokane Division
24001 E. Mission Ave, Liberty Lake, WA 99019-9599 U.S.A.

HP 8662A Specifications

General

Brand	HP
Model	8662A
Category	Portable Generator
Language	English