On-Board RAM 
Memory 
on 
the 
Model 330  processor 
board 
is  similar 
to 
the 
4 
Mbyte 
RAM 
controller 
board. 
It's 
like 
the 
RAM 
controller 
board, 
but 
simpler in operation.  A comparison between 
the 
RAM 
section 
of 
Figure 
3-16 
and 
the 
RAM 
controller 
diagram 
in  Figure 3-19 shows 
the 
difference. 
RAM Control 
The 
DIO-II 
bus 
handles all 
data 
and 
address transfers. 
It 
also 
supports 
DIO 
bus 
masters. 
The 
system 
bus 
is 
not 
used on 
the 
Model 330 processor; 
there 
is no connector 
on 
the 
processor 
board 
for  it. 
RAM Configuration 
Configuration 
of 
the 
Model 330 processor's 4 Mbytes 
of 
RAM is set by 
10 
dip switches.  These 
switches allow 
the 
RAM 
controller 
to 
adjust 
to 
the 
CPU 
as well  as configure in 
the 
optional 4 
Mbyte 
and 
12 
Mbyte 
add-on 
board 
sizes.  Processor 
board 
on-board 
RAM 
top 
address is set by 
these 
switches. 
Switches  are  set 
to 
one 
of 
the 
4M  address  boundaries 
starting 
at 
the 
top 
of 
RAM,  address 
FFFFFFFF. 
Only 
the 
three 
most  significant  digits  (MSD) 
of 
hexadecimal  addressess  are af-
fected.  As 
the 
first  eight  switches  (S31,  S30  ...  S24)  represent 
the 
two  MSDs, 
the 
last  two 
switches 
(S23,  S22) 
can 
only  change 
the 
third 
hexadecimal MSD  by  4M  addresses; 
the 
lower 
two 
binary 
positions 
of 
the 
third 
hexadecimal digit are implied as 
1. 
Two 
configurations are possible for  Model 330 computers. 
They 
are shown in 
the 
next 
section 
under 
RAM 
Configuration. 
Optimizing Model 330 System Performance 
Each 
of 
the 
Series 300 
operating 
systems (BASIC, Pascal, 
and 
HP-UX) are 
booted 
into different 
memory address ranges.  Application 
programs 
are loaded into 
other 
memory address ranges. 
Depending 
on 
the 
operating 
system 
and 
application 
program 
used, frequently accessed memory 
addresses 
mayor 
may 
not 
be 
in processor 
on-board 
RAM. 
If 
optimum 
performance is  desired 
fot a  given application, 
this 
Inay 
be 
possible by  readdressing processor 
on-board 
RAM 
to 
the 
addresses frequently accessed by 
the 
application. 
Cycle 
time 
for processor 
board 
RAM 
is less 
than 
for 
HP 
98258A/B/C 
RAM assemblies. 
This 
is 
due 
to 
the 
longer 
read/write 
cycles 
on 
the 
DIO-II 
bus 
to 
the 
optional 
4 
Mbyte 
RAM controller 
board. 
You 
may 
configure 
the 
Model 330 
computer's 
memory so 
the 
application 
program 
spends 
the 
maximum 
amount 
of 
time 
executing in 
the 
processor's 
on-board 
RAM. 
If 
a  Model 330 
computer 
system has 
the 
maximum 
of 8 
Mbytes 
of 
RAM,  one 
of 
the 
two con-
figurations shown in  Table 3-5 will  optimize 
that 
system's 
performance.  Here's 
what 
to 
do 
to 
determine 
which configuration works best: 
1. 
Select a frequently-used 
program 
or 
routine 
as a  benchmark. 
2. 
Run 
and 
time 
the 
benchmark 
program 
enough 
to 
determine 
that 
it 
consistently executes 
in 
the 
same 
length 
of 
time. 
Note:  in 
this 
example, memory 
is 
now addressed as shown in Table 3-5, 
Example 
1. 
80 
Functional Description