IBM System/370 Guide

Processor storage can be accessed concurrently by any combination
of one or more channels and the CPU for a total of four unique logical
memory requests. Contention arises when two or more components attempt
to access the same logical memory simultaneously. In addition, requests
made to a busy logical memory are delayed until the memory becomes
free. The storage control unit (SCU), illustrated in Figure 10.15.2,
controls all storage references by components and schedules requests
according to a priority scheme. The channels have priority over the
CPU for simultaneous requests and there is a definable priority among
channel positions. Thus, the SCU ensures that an effective storage
access of 32 bytes in two microseconds is achieved for the system
whenever possible.
Storage access times stated in this guide are obtainable, assuming
the four logical memories required are free when requested and accessed
concurrently with no interference from other components.
Processor Storage
Logical
Logical
Logical
Logical
Memory
Memory
Memory
Memory
1
1 1 1
Jl
Storage Control Unit
"
I
Channel
Processor Storage Control
I ~
: t
Channel
High-Speed
-
...
Channel
Buffer
-
, ...
Buffer and
Storage
Bus Controls
Controls
r'-'
,. ....
Channel
Buffer
Buffer
Storage
Storage
I
~
4 buffers/channel
Channel
I
Channel
~
Instruction Execution
Unit
Unit
Central Processing Unit (CPU)
Figure 10.15.2. Model 165 storage components and controls
17

IBM System/370 Specifications

General

Brand	IBM
Model	System/370
Category	Server
Language	English