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IBM System/370 Guide

IBM System/370
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The
use
of
I/O
buffers
in
the
SCU
allows
channel
requests
to
be
made
to
processor
storage
concurrently
with
other
channel
or
CPU
requests
when
requests
are
for
different
logical
memories.
Additional
internal
buffering
in
the
2880
channel
allows
it
to
withstand
longer
wait
times
for
requested
logical
memories
and
thus
reduces
channel
overrun
exposure.
The
channel
buffering
scheme
implemented
in
the
Model
165
is
most
efficient
for
2880
channels.
Use
is
made
of
all
four
buffers
available
per
channel,
while
only
two
buffers
can
be
used
for
2860
channels.
This
scheme
supports
overlapped
processor
storage
requests
from
the
same
2880
channel
so
that
at
any
given
channel
priority
position,
a
2880
can
sustain
a
higher
data
rate
than
a
2860.
A
2301
drum
connected
to
a
2860
Selectnr
Channel
mnst
be
placed
in
the
highest
or
second
highest
channel
priority
position
on.
a
Model
165.
Channel
address
1
or
2
must
be
used.
For
most
efficient
operation
of
2301
drums,
they
should
be
attached
to
a
Model
165
via
a
2880
channel,
since
the
2301
causes
much
less
CPU
interference
during
data
transfer
operations
when
connected
to
a
2880,
rather
than
to
a
2860.
In
contrast
to
the
Model
165,
the
Model
65
does
not
contain
additional
buffering
in
its
CPU
and
because
of
timing
considerations
cannot
utilize
the
two-way
interleaving
capability
of
its
main
storage
for
I/O
operations.
Thus,
in
a
Model
65,
without
the
use
of
buffering
in
the
SCU,
the
memory
bus
is
busy
for
an
average
of
1.1
microseconds
when
storing
one
doubleword
from
a
2860
channel
buffer.
In
a
Model
165,
with
no
interference,
four
doublewords
from
channel
buffers
in
the
SCU
can
be
placed
in
processor
storage
in
2
microseconds
(one
doubleword
in
each
logical
memory).
Comprehensive
error
checking
has
heen
incorporated
in
the
basic
design
of
the
channel
hardware.
Checking
is
performed
on
the
control
logic
in
most
areas
and
standard
parity
checking
is
done
on
the
data
flow.
Improved
error
recovery
hardware
has
also
been
included
<discussed
fully
in
the
RAS
section).
The
Channel-to-Channel
Adapter
feature
available
for
the
Model
65,
which
permits
two
System/360
channels
to
be
interconnected,
is
also
an
optional
feature
for
the
Model
165.
The
Channel-to-Channel
Adapter
itself
cannot
be
installed
on
a
2880
or
a
2870
channel;
however,
a
2880
or
a
2870
can
be
connected
to
an
adapter
installed
on
another
channel.
Thus,
a
2880
or
a
2870
can
be
interconnected
to
a
2860
channel,
a
Model
155
channel,
a
Model
50
channel,
etc.,
that
has
the
Channel-to-Channel
Adapter
attached.
THE
2880
BLOCK
MULTIPLEXER
CHANNEL
The
2880
can
operate
either
as
a
selector
or
a
block
multiplexer
channel.
The
setting
of
a
channel
mode
bit
in
a
control
register
determines
the
mode
in
which
2880
channels
operate.
The
mode
bit
is
set
to
selector
mode
at
IPL
and
on
system
reset
and
can
be
altered
by
programming
at
any
time.
When a START
I/O
instruction
is
issued
to
a
2880,
the
setting
of
the
channel
mode
bit
determines
the
mode
in
which
the
addressed
subchannel
will
operate.
The
new
START
I/O
FAST RELEASE
instruction
can
be
used
with
2880
Block
Multiplexer
channels.
This
instruction
differs
from
a START
I/O
in
that
START
I/O
FAST RELEASE
permits
the
CPU
to
execute
the
next
sequential
instruction
sooner.
That
is,
if
the
addressed
2880
is
not
busy
when
START
I/O
FAST RELEASE
is
issued,
the
assumption
is
made
that
the
I/O
operation
can
be
started
and
the
CPU
is
not
held
up
awaiting
a
response
from
the
device's
control
unit.
If
it
is
determined
28
I

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IBM System/370 Specifications

General IconGeneral
BrandIBM
ModelSystem/370
CategoryServer
LanguageEnglish

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