Integra DTR-6.4 - Page 67

DTR-6.4
IC BLOCK DIAGRAMS AND DESCRIPTIONS
MM1512(Y-C mixer circuit)
6
1
2
3
4
5
Bias
Clamp
-6dB
DRV
12dB
SAG
OUT
Vcc
YIN
GND
CIN
1
2
3
4
8
7
6
5
+
+
Vcc
OUT B
-IN B
+IN B
V
DD
OUT A
-IN A
+IN A
TK15420(Operation amplifier)
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28 27 26 25 24 23 22 21 20 19 18 17 16 15
DAC DAC
PLL DET VCO 1/2
1/8
8fsc
4fsc
I CBUS
2
8fsc
INTERPOLATION
CORING
PEAKING
LPF
Ped.
CLIP
++
CORING V-ENHANCER
KILLER
LINE
MEMORY
LINE
MEMORY
CNR
C-N.C
DYNAMIC COMB
FILTER
ADC
Sync Clamp
DELAY
VB1 COUT Vss1 YOUT VB2 PD FIL Vss4 VDD4 FSC TESTOUT MODE1 SDA SCL
BIAS
VRT
VDD1
TEST11
Vss2
VRB
YCIN
TEST
KILLER
TEST12
VDD3
Vss3
VDD2
TEST13
TC90A69F(Comb Filter IC)