RX Reconfiguration Management
• 0: No oversampling
• 1: 5× oversampling
reconfig_mgmt_write
Output 1 RX reconfiguration management Avalon-
MM interface to transceiver arbiter
reconfig_mgmt_read
Output 1
reconfig_mgmt_address
Output 12
reconfig_mgmt_writedata
Output 32
reconfig_mgmt_readdata
Input 32
reconfig_mgmt_waitrequest
Input 1
HDMI RX Core Signals
TMDS_Bit_clock_Ratio
Output 1 SCDC register interfaces
audio_de
Output 1 HDMI RX core audio interfaces
audio_data
Output 256
audio_info_ai
Output 48
audio_N
Output 20
audio_CTS
Output 20
audio_metadata
Output 165
audio_format
Output 5
aux_pkt_data
Output 72 HDMI RX core auxiliary interfaces
aux_pkt_addr
Output 6
aux_pkt_wr
Output 1
aux_data
Output 72
aux_sop
Output 1
aux_eop
Output 1
aux_valid
Output 1
aux_error
Output 1
gcp
Output 6 HDMI RX core sideband signals
info_avi
Output 112
info_vsi
Output 61
colordepth_mgmt_sync
Output 2
vid_data
Output N*48 HDMI RX core video ports
Note: N = symbols per clock
vid_vsync
Output N
vid_hsync
Output N
vid_de
Output N
mode
Output 1 HDMI RX core control and status ports
continued...
2 Intel FPGA HDMI Design Example Detailed Description
UG-20077 | 2017.11.06
Intel
®
FPGA HDMI Design Example User Guide for Intel
®
Arria 10 Devices
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