JVC XP-A1000BK - Page 26

XP-A1000BK
@ MN188321JSR1 (IC601) ...
(1) General:
..... MICROCOMPUTER
MN188321 is a single-chip dual CPU microcomputer.
These two CPUs can execute programs in a time
sharing mode. It has a built-in 32K-byte ROM, a 448
byte RAM and the following peripheral functions: one
8-bit synchronous serial system, one 8-bit asyn-
chronous serial communication system (Universal
Asynchronous Receiver Transmitter: UART), five
16-bit timer counters and two external interrupt in-
MHz and 32 kHz). The machine cycle is a minimum of
0.5us (8 MHz) and is indicated by pin 64 SDIP/QFP.
The microcomputer receives signals from the opera-
tion keys and the remote controller, sends data to the
indicators, sends the DSP LSls control data and ad-
dresses for the SRAM, and processes input/output
data to save manual programs and control muting and
puts. The MN188321 has a switchable two-speed volume.
system clock using two built-in oscillation circuits (8
(2) Sketch drawing =
oe fa}
~ 2
oO iz $ e c - N ™m =
wold = oO fs) Oe aaqt 0 n
So O0P Sa 5 goo Spa otene eo: oe
-
vm
fn
On
S
S°s5
5
Fat
~
>>
OM
OG
ER
IY
I
a
>
eec0C bbb ro oOeSESZSRPOUYERE WHE OOe How
31 ISL fo [3] (3) [ol Is) fo) (3) 2) (1S) IS) (2) FS) I SSS
RST
IND ON
oscil osc2
Vss
Ww
3
a
=
MUTE2
MUTE 1
KEYO3 KEYO2
KEYO1
KEYOO KEY1I3
|
|
77)
oO
“
N
wn
9
(3) Functions of terminals
ro)
Summary of Functions
+5V
To display AO
To Display RESET (Level ‘‘H” when the character display is OFF)
To Display CS2, SRAM CS1
To Display WR, SRAM WE
CS2/CS1
WRI/WE _
RD/OE
A10
AQ
A8
A7
AG
A5
A4
A3
A2
Al
To Display RD, SRAM OE
SRAM address 10
SRAM address
SRAM address
SRAM address
SRAM address
SRAM address
SRAM address
SRAM address
SRAM address
SRAM address
OOOO; O/D/Ol/AO/O;/O/O;O|/ol;olo
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