Lattice Semiconductor CrossLink User Manual

CrossLink Programming and Configuration Usage Guide
Technical Note
© 2015-2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-TN-02014-1.2 29
Date
Version
Change Summary
February 2017
1.1
 Updated the Configuration Ports Default Behavior and Arbitration section with
default behavior
 Updated the Configuration section with two cases
 Added Note 2 to Table 4.4. Default State in Diamond for each Port
 Changed CCLK to “MCK or SPI_SCK”, MCK to CSN, and general purpose I/O to
SPI_SS in the Master and Slave SPI Configuration Port Pins section
 Changed MCLK to MCK in Master SPI Configuration Mode section
 Added reference to the Programming Tools User Guide
August 2016
1.0
Updated document numbers, the previous document number was TN1303.
May 2016
1.0
First preliminary release.

Lattice Semiconductor CrossLink Specifications

General

Brand	Lattice Semiconductor
Model	CrossLink
Category	Controller
Language	English