Bus Sizer
The MPC603e processor does not support dynamic bus sizing, which is performed
with the 68K processor family. Each 8bits of the 32bit bus is fixed or assigned with
the lower addresses, or 0 through 3 bits. Therefore, if an 8bit device were directly
connected to the bus, this device would be seen in 4byte steps each in the memory
map area. To avoid this, the 8bit-bus peripheral unit is connected to the 32bit-bus
through the bus sizer, MC68150 (IC15). The bus sizer divides one bus cycle for
accessing 32 bit-bus of the processor into four cycles each of 8bit accessing cycle,
and/or assigns 8bit-bus data to a corresponding 8bits within the 32bits.
8bit Peripherals
The following devices are listed as 8bit data bus units:
• PCMCIA Interface
• Flash PROM
• NVRAM
• RTC
• Interrupt Controller
• GPIB Interface
• Small-peripherals Interface
• Internal printer Interface
• Front-Panel I/F
• Other registers and ports
PCMCIA, type I/II/III interface
This interface consists mainly of buffers for both data and address busses. IC65 (D-
F/F) holds control bits for the signals resetting the card, switching between the data
area and the attribute area, and switching the card's modes. All bits in the register
are reset to zero when the _RESET signal goes to active low, which means that their
state is also guaranteed at power-up.
IC66 and the IC67 invert the most significant address bits of the memory card
whenever the SWAP jumper is plugged in, so that the first bytes are always
allocated to "FFF00000", regardless of the size of the memory card. This allows the
processor to boot directly from the PCMCIA memory card used.
Flash PROM
Two pieces of Intel's 29F016-compatible 2MB PROMs (IC45 and 46) are used.
These ICs do not require any programming voltage to write. From a hardware point
of view, a flash PROM is regarded the same as an EPROM in read mode. To erase
or write to memory, commands are written into the data bus. Writing and erasing
must be performed by monitoring the status-signals (RY/#BY) on the port (IC49).
The program may be seen to start from the Flash PROM. The Flash PROM is,
however, not regarded as the program or its program area even when start-up (even
Theory of Operation 4-5
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