LeCroy Waverunner2 Series

4-2 Theory of Operation
CPU’s Block Diagram
CPU : PowerPC603e
SDRAM max 512MB
Super I/O
MAIN Board I/F
VGA : 65545
BUS Sizer :
RS232C, Parallel, Floppy
32bit BUS
Flash PROM :
NVRAM : 128KB
Real Time Clock
Interrupt Controller
Front Panel I/F
GP-IB
Internal Printer I/F
Small Peripherals
PCMCIA type I/II/III
Other Control Ports
8bit BUS
Figure 4-1 CPU Block Diagram