LG 47LW6500 - Block Diagram -Tuner(GP3)

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High Chassis
BCM35230
(IC101)
High Chassis
High Chassis
BCM35230
BCM35230
(IC10
(IC10
1
1
)
)
TDFQ-G031D
_
TU2203
TDFQ-G031D
_
TU2203
S2_ Reset,IF_AGC_MAIN,TU_RESET,RF_SWITCH/BOOSTER_CTL
FE_TS_DATA[0-7],IF_P/N_MAIN
CI Slot
P1901
CI Slot
CI Slot
P19
P19
01
01
SCL0/SDA0_3.3V,
IC1905
IC1905
IC1905
IC2301
IC2301
IC2301
LNB_OUT
LNB_TX,TU_TS_VAL/ERR
TU_TS_SYNC,TU_TS_CLK
TS_VAL_ERR
SCL3/SDA3_3.3V
TU_CVBS/SIF,
LNB_INT
CI_ADDR[2-14],
CI_ADDR[2/3/4/7/9/
11/12/13]
PCM_ADDR[2/3/4/7/9/
11/12/13]
IC1903
IC1903
IC1903
CI_DATA[0-7]
NAND_DATA[0-7]
IC1904
IC1904
IC1904
CI_DET
/CI_CD1/CD2
Block diagram –Tuner(GP3)