Marantz MM8003 - Page 42

60
IC40 : R5F21246SNFP [MAIN CPU]
Pin
No
Port I/O USE STBY Port Name Act. Init Note
36 P64 I/O O H _POWER_LED2 L H Power LED2
37 P63 I/O O H _POWER_LED1 L H Power LED1
38 P07/AN0 I/O I I _P_CUR_FAIL L H Power Amp Current DC Fail Detect
39 NC NC - X X X X NC
40 NC NC - X X X X NC
41 P06/AN1 I/O I I _P_AMP_FAIL L H Power Amp DC Fail Detect
42 P05/AN2 I/O AD I _HEAT_DET_2 - -
Power AMP Heat detection 2
(NS LM94022)
43 P04/AN3 I/O AD I _HEAT_DET_3 - -
Power AMP Heat detection 3
(NS LM94022)
44 P42/VREF I/O I I VREF - - +3.3V
45 P60/TREO I/O I I __P_LINE_FAIL - L Emergency Protection
46 P62 I/O O L _STANDBY1 L H Standby Control 1
47 P61 I/O O L _STANDBY2 L H Standby Control 2
48 P03/AN4 I/O AD I _HEAT_DET_1 - -
Power AMP Heat detection 1
(NS LM94022)
49 P02/AN5 I/O I I
_AVSS_DET L H Power AMP AVSS Level detection
50 P01/AN6 I/O O L AVSS_OUT H L Power Supply H/L switch
51 P00/AN7 I/O O L _MUTE L L ALL Channel Signal MUTE
52 P37/SSO I/O O L _STBY_LED L H Standby LED On
R8C/24 Group, R8C/25 Group 1. Overview
Rev.3.00 Feb 29, 2008 Page 4 of 51
REJ03B0117-0300
1.3 Block Diagram
Figure 1.1 shows a Block Diagram.
Figure 1.1 Block Diagram
R8C/Tiny Series CPU core
A/D converter
(10 bits
u 12 channels)
System clock
generation circuit
XIN-XOUT
High-speed on-chip oscillator
Low-speed on-chip oscillator
XCIN-XCOUT
UART or
clock synchronous serial I/O
(8 bits u 2 channels)
Memory
Watchdog timer
(15 bits)
ROM
(1)
RAM
(2)
Multiplier
R0H R0L
R1H
R2
R3
R1L
A0
A1
FB
SB
USP
ISP
INTB
PC
FLG
I/O ports
NOTES:
1. ROM size varies with MCU type.
2. RAM size varies with MCU type.
I
2
C bus interface or clock synchronous
serial I/O with chip select
(8 bits u 1 channel)
8
Port P1
6
Port P3
3 3
Port P4
8
Port P0
8
Port P2
8
Port P6
LIN module
(1 channel)
Timers
Timer RA (8 bits)
Timer RB (8 bits)
Timer RD
(16 bits u 2 channels)
Timer RE (8 bits)
Peripheral functions