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Microchip Technology dsPIC33 series User Manual

Microchip Technology dsPIC33 series
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dsPIC33/PIC24 Family Reference Manual
DS70005340A-page 112 2018 Microchip Technology Inc.
13.1 Recovery from Bus Off State
If the TEC exceeds 255, the TXBO (C1TRECH<5>) and CERRIF (C1INTL<13>) bits will be set.
The module will go to bus off and start the bus off recovery sequence.
The bus off recovery sequence starts automatically. The module will transition out of the bus off
state only after the detection of 128 Idle conditions (see “ISO11898-1:2015: Bus Off Management”).
The module will set FRESET for all transmit FIFOs when entering the bus off state to ensure that
the module does not try to retransmit indefinitely. The application will be notified by CERRIF and
has the option to queue new messages for transmission.
The module signals the exit from the bus off state with the CERRIF bit and by setting the
TXBOERR bit (C1BDIAG1H<7>). Additionally, C1TREC will be reset.

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Microchip Technology dsPIC33 series Specifications

General IconGeneral
BrandMicrochip Technology
ModeldsPIC33 series
CategoryMotherboard
LanguageEnglish

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