2018 Microchip Technology Inc. DS70005340A-page 81
CAN FD Protocol Module
8.0 MESSAGE FILTERING
All messages on a CAN network will be received by all nodes. In order to process only messages
of interest, a hardware filtering mechanism is implemented. The CAN FD Protocol Module can
be configured to receive only messages of interest. The module contains 32 acceptance filters.
Each acceptance filter contains a filter object and a mask object. The user application configures
the specific filter to receive a message with a given identifier by setting the filter object and mask
object to match the identifier of the message to be received.
8.1 Filter Configuration
The filters are controlled by the C1FLTCONxL and C1FLTCONxH registers. The filters must be
disabled by clearing the FLTEN bit before changing the filter or mask object; the module need
not be in Configuration mode. After the filter object is updated, the Buffer Pointer, FnBP, has to
be initialized and the filter can be enabled by setting the FLTEN bit. The FnBP points to the
FIFO where the matching receive message needs to be stored.
8.2 Filtering a Received Message
The CAN FD Protocol Module starts acceptance filtering after the arbitration field and when the first
three data bytes of a message are received. Figure 8-1 describes the flow of message filtering.
The module loops through all the filters, starting with Filter 0, which is the highest priority filter.
The message in the Receive Message Assembly Buffer (RXMAB) is compared to the filter and
mask. In case the message matches the filter and it is received without any errors, the message
will be stored into the RX FIFO pointed to by the FnBP. Acceptance filtering is stopped and the
associated RFIF bit is set.
In case an RTR is received, the TXREQ bit of the TX FIFO pointed to by FnBP will be set.
Filtering will continue with the next filter and RXOVIF will be set only when one of the following
happens:
• A filter matches, but the RX FIFO is full.
• When multiple filters match the same message and all matching RX FIFOs are full, only the
RXOVIF of the FIFO pointed to by the highest priority filter will be set.
• The RXOVIF bit will be set if the TX FIFO is empty during an RTR (TXEN = 1, RTREN = 1).
If none of the filters match, the received message will be discarded.
Note: If the module receives a message that matches a filter, but the corresponding FIFO is
a TX FIFO (TXEN = 1, RTREN = 0), the module will discard the received message.
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