Microchip Technology dsPIC33CK - Page 49

Schematics and Layout
 2020 Microchip Technology Inc. DS50002927A-page 49
FIGURE A-6: SCHEMATICS PAGE 6 OF 8
+5V
HALL_A
HALL_C
HALL_A
HALL_B HALL_C
HAL L
100 pF
C109
100 pF
C110
100 pF
C111
HALL_B
4.7k
R170
4.7k
R171
4.7k
R172
Hall Sensor Interface
+5V
QEI_A
QEI_INDEX
QEI_A QEI_B QEI_INDEX QEI_HOME
QE I
QEI_B
QEI_HOME
+3.3V
+3.3V
Quadrature Encoder Interface
+3.3V
+3.3V
DGND DGND DGND DGND DGND DGND
DGND DGND DGND DGND DGND DGND DGND DGND
DGND
DGND
1
2
3
4
5
6
TERMINAL 1x6
J7
1
2
3
4
5
6
TERMINAL 1x6
J8
DNP
R202
DNP
R201
DNP
R52
100R
R173
100R
R204
100R
R203
2.2k
R62
2.2k
R63
2.2k
R64
2.2k
R65
1k
R58
1k
R59
1k
R60
1k
R61
DNP
R55
DNP
R57
DNP
R56
DNP
R54
10 pF
C112
10 pF
C113
10 pF
C143
10 pF
C144
Bumpon Hemisphere Black
PAD1 PAD2 PAD3 PAD4
SD103AW
D17
Fiducial
FD1
Fiducial
FD2
Fiducial
FD3
Fiducial
FD4
SD103AW
D18
SD103AW
D19
SD103AW
D20
SD103AW
D21
SD103AW
D22
SD103AW
D23
HOME