7 Applied Instructions
7.2 Move and Compare
162
FXCPU Structured Programming Manual
(Basic & Applied Instruction)
Cautions
1) The FX0N, FXU and FX2C PLCs handle file registers as follows.
2) The FX0N PLC does not support the instructions of pulse operation type.
To execute pulse operation, make the instruction execution condition pulse type.
3) When specifying digits of bit devices, specify a same number of digits for and .
4) Some restrictions to applicable devices
S1:The FX
3U, FX3UC and FX3G PLCs only are applicable.
S2:The FX
3U and FX3UC PLCs only are applicable.
BMOV instruction
Read Write
FX0N 3
FXU
FX2C
33
FXU
(V2.30 or earlier)
3
n = 2 points
Y000
Y001
Y002
M 0
M 1
M 2
M 3 Y003
Y004
Y005
Y006
M 4
M 5
M 6
M 7 Y007
Specify a same number of digits.
(Example: K1)
M8000
K1M0 K1Y000
BMOV
EN
s
n
ENO
d
K2
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