Mitsubishi Electric MELSEC FX Series - 7.27.3 INITR

7 Applied Instructions
7.27 Extension File Register Control
772
FXCPU Structured Programming Manual
(Basic & Applied Instruction)
7.27.3 INITR
Outline
This instruction initializes (to "HFFFF <K-1>") extension registers (R) in the RAM built in a PLC and extension
file registers in a memory cassette (flash memory) before data logging by LOGR instruction.
In FX
3UC PLCs former than Ver. 1.30, use this instruction to initialize extension file registers (ER) before
writing data to them using SAVER instruction.
In FX
3UC PLCs Ver. 1.30 or later and FX3U PLCs, INITER instruction is also provided to initialize (to "HFFFF"
<K-1>) only extension file registers (ER) in a memory cassette (flash memory) in units of sector.
→ For SAVER instruction, refer to Section 7.27.2.
→ For LOGR instruction, refer to Section 7.27.4.
→ For INITER instruction, refer to Section 4.27.6.
1. Format and operation, execution form
2. Set data
3. Applicable devices
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Instruction
name
Operation
Execution
form
Expression in each language
Structured ladder ST
INITR 16 bits Continuous INITR(EN,s,n);
INITRP 16 bits Pulse INITRP(EN,s,n);
Variable Description Data type
Input
variable
EN Execution condition Bit
Device of extension register and extension file register to be initialized
It is possible to specify only the head device in a sector of extension
registers.
ANY16
Number of sectors of extension registers and extension file registers to be
initialized.
ANY16
Output
variable
ENO Execution state Bit
Operand
type
Bit Devices Word Devices Others
System user Digit specification
System
user
Special
unit
Index
Cons
tant
Real
Number
Character
String
Pointer
XYMTCS
D.b
KnX KnY KnM KnS T C D R
U\G
VZModifierKH E
""
P
zz
zz
INITR
EN
s
n
ENO
INITRP
EN
s
n
ENO