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Mitsubishi Electric MELSEC FX Series - Page 206

Mitsubishi Electric MELSEC FX Series
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7 Applied Instructions
7.3 Arithmetic and Logical Operation
204
FXCPU Structured Programming Manual
(Basic & Applied Instruction)
Function and operation explanation
1. 16-bit operation(NEG, NEGP)
Each bit of the device specified by is inverted (0 1, 1 0), "1" is added, and then the result is stored
in the original device.
2. 32-bit operation(DNEG, DNEGP)
Each bit of the device specified by is inverted (0 1, 1 0), "1" is added, and then the result is stored
in the original device.
Cautions
1) When handling 32-bit data in a structured program, a 16-bit device cannot be specified directly as in the
case of a simple project. Use a label to handle 32-bit data.
A 32-bit counter can be specified directly as it is a 32-bit long device.
Use a global label to specify a device.
2) Note that the complement is obtained in every scan time (operation cycle) in a continuous operation type
instruction (NEG,DNEG).
3) Some restrictions to applicable devices
S1:The FX
3U and FX3UC PLCs only are applicable.
Command input
Complement data
NEG
EN ENO
d
( ) +1
d d
Command input
Label1
*1
DNEG
EN ENO
d
( +1, )+1 = ( +1, )
d d d d
*1 This defines the device that stores the complement data.

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