7 Applied Instructions
7.6 High Speed Processing
281
FXCPU Structured Programming Manual
(Basic & Applied Instruction)
1
Outline
2
Instruction List
3
Configuration of 
Instruction
4
How to Read 
Explanation of 
Instructions
5
Basic Instruction
6
Step Ladder 
Instructions
7
Applied 
Instructions
8
Interrupt Function 
and Pulse Catch 
Function
A
Relationships 
between devices 
and addresses
5. Reset operation by an external terminal [M8025
*1
: DHSC (external reset) mode]
For a high speed counter equipped with an external reset terminal (R) such as C241, an instruction is
executed and the comparison result is output at the rising edge of the reset input signal.
(The FX
U PLC of V2.1 or later and produced February 1990 or later are compatible with this function. The
FX
0, FX0S, FX0N, FX1S, FX1N, FX1NC or FX3G is not compatible.)
1) Program
If an instruction for the high speed counter is used while M8025
*1
 is driven, the instruction is executed
again when the current value of the high speed counter C241 is cleared by an external reset terminal.
And the comparison result is output even if a counting input is not given.
2) Operation
When the external reset input X001 turns ON while the current value of C241 is "100", for example, the
current value of C241 is reset to "0". And Y000 is reset at this time even if a counting input is not given.
M8000
RUN 
monitor
M8025
External reset mode
*1
DHSCR
EN
s1
s2
ENO
d
CN241
Y000
VAR_01
*
External reset 
terminal for C241
X001
OUT_C_32
EN
CCoil
CValue
ENO
CC241
K9,999
* VER_01 is a global label and is defined as K100.
*1. It is not necessary to drive M8025 for the FX
0
, FX
0S
, FX
0N
, FX
1S
, FX
1N
, FX
1NC
 and FX
3G
 PLCs.
The above reset operation takes place as a basic function.