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Mitsubishi Electric MELSEC FX Series - Page 61

Mitsubishi Electric MELSEC FX Series
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5 Basic Instruction
5.1 LD, LDI, AND, ANI, OR, OR
59
FXCPU Structured Programming Manual
(Basic & Applied Instruction)
1
Outline
2
Instruction List
3
Configuration of
Instruction
4
How to Read
Explanation of
Instructions
5
Basic Instruction
6
Step Ladder
Instructions
7
Applied
Instructions
8
Interrupt Function
and Pulse Catch
Function
A
Relationships
between devices
and addresses
6. ORI (Parallel connection of NC (normally closed) contacts)
7. Relationship with AND (...)
The parallel connection by OR or ORI
instruction is connected to the preceding LD
or LDI instruction in principle. The "AND (...)
after" instruction, however, the parallel
connection by OR or ORI instruction is
connected to the second preceding LD or LDI
instruction.
8. Indexing
Devices used in LD, LDI, AND, ANI, OR and ORI can be indexed with index registers (V, Z).
(State relays (S), special auxiliary relays (M), 32-bit counters (C) or "D
.b" cannot be indexed.)
Applicable only to the FX
3U and FX3UC PLCs.
When a used devices is an input (X) or output
(Y), the value of an index register (V or Z) is
converted into an octal number, and then
added.
Example: When the value of V0 is "10", the
LD contact is set to ON (becomes
conductive) or OFF (becomes
nonconductive) by X013.
9. Bit specification of data register (D)
A bit in data register (D) can be specified as a device used in LD, LDI, AND, ANI, OR and ORI.
Applicable only to the FX
3U and FX3UC PLCs.
When specifying a bit in data register, input "."
after a data register (D) number, and then
input a bit number (0 to F) consecutively.
Only 16-bit data resister is applicable.
Specify a bit number as "0 1, 2, ..., 9, A, B, ...,
F" from the least significant bit.
Example: In the example shown on the left,
LD contact is set to ON (becomes
conductive) or OFF (becomes
nonconductive) by the bit 3 of D0.
timing chart
ORI
LD
X000
Y001
X002
[Structured ladder] [ ST ]
Y001:= X000 OR NOT X002;
X002
X000
ON ON
ON ON
ONONON
ON
Y001
ORI
OR
OR
OR
OR
LD
LD
AND(...)
AND (...) before
AND (...) after
[Structured ladder] [ ST ]
Y000:= X000 OR X001V0;
X001V0
X000
Y000
[Structured ladder] [ ST ]
D0.3
Y003:= X002 AND D0.3;
X002
Y003

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