Mitsubishi Electric MELSEC FX Series - Page 65

5 Basic Instruction
5.2 LDP, LDF, ANDP, ANDF, ORP, ORF
63
FXCPU Structured Programming Manual
(Basic & Applied Instruction)
1
Outline
2
Instruction List
3
Configuration of Instruction
4
How to Read Explanation of Instructions
5
Basic Instruction
6
Step Ladder Instructions
7
Applied Instructions
8
Interrupt Function and Pulse Catch Function
A
Relationships between devices and addresses
2. LDF, ANDF, ORF (Initial logical operation of falling/trailing edge pulse, serial connection
and parallel connection)
In the example shown above, M0 or M1 is ON during only one operation cycle when X000 to X002 turn OFF
from ON.
3. Bit specification of data register (D)
A bit data register (D) can be specified as a device used in LDP, LDF, ANDP, ANDF, ORP and ORF
instructions.
When specifying a bit in data register, input "."
after a data register (D) number, and then input
a bit number (0 to F) consecutively.
Only 16-bit data resister is applicable.
Specify a bit number as "0 1, 2, ..., 9, A, B, ..., F"
from the least significant bit.
Example: In the example shown on the left, LDP
contact turns ON (becomes
conductive) or OFF (becomes
nonconductive) when the bit 3 of D0
turns ON or OFF.
IF (LDF(TRUE,X0)) OR (LDF(TRUE,X001)) THEN
M0:= TRUE;
END_IF;
M1:= ANDF(M8000,X002);
[Structured ladder] [ ST ]
M8000
ANDF
EN
s
ENO
X002
M1
X000
LDF
EN
s
ENO
M0
ORF
EN
s
ENO
X001
RUN monitor
ON
ON ON
ON
timing chart
ORF
LDF
X000
M0
X001
ON
ON
during one
operation
cycle
M8000
ANDF
M1
X002
ON ON ON
ON
during one
operation
cycle
[Structured ladder] [ ST ]
Y000:= LDP(TRUE,D0.3);
D0.3
LDP
EN
s
ENO
Y000