Mitsubishi Electric MELSEC FX Series - Page 95

5 Basic Instruction
5.11 PLS, PLF
93
FXCPU Structured Programming Manual
(Basic & Applied Instruction)
1
Outline
2
Instruction List
3
Configuration of Instruction
4
How to Read Explanation of Instructions
5
Basic Instruction
6
Step Ladder Instructions
7
Applied Instructions
8
Interrupt Function and Pulse Catch Function
A
Relationships between devices and addresses
Function and operation explanation
1. PLS (rising edge differential output)
In the figure above, M0 is ON during only one operation cycle when X000 changes from OFF to ON.
2. PLF (falling edge differential output)
In the figure above, M1 is ON during only one operation cycle when X000 changes from ON to OFF.
3. Output drive side
The following two circuits cause a same operation.
In each case, M0 is ON during only one operation cycle when X000 changes from OFF to ON.
In each case, MOV instruction is executed only once when X000 changes from OFF to ON.
ON
[Structured ladder] [ ST ] timing chart
PLS(X000, M0);
X000
M 0
PLS instruction
ON during one
operation cycle
X000
PLS
EN ENO
d
M0
ON
timing chart
X000
M 1
PLF instruction
ON during one
operation cycle
[Structured ladder] [ ST ]
PLF(X000, M1);
X000
PLF
EN ENO
d
M1
<<OUT instruction>>
X000
X000
M1
=
<<PLS instruction>>
ON
X000
M 0
ON during one
operation cycle
ON
M 1
X000
PLS
EN ENO
d
M0
M0
M1
<<PLS instruction>> <<Pulse operation type applied instruction>>
X000
MOV
EN
s
ENO
d
D0K10
M0
PLS
EN ENO
d
M0
MOVP
EN
s
ENO
d
D0K10