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CHAPTER 4 DEVICES
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4.8 Extended Data Register (D) and Extended Link Register (W)
(4) Precautions
For use of the extended data register (D) and extended link register (W), pay attention to the following.
• Since the file register (ZR) area is used, the values of the following items will be the same as those for the
file register (ZR) when the extended data register (D) and extended link register (W) are specified.
• The file register size cannot be changed while the CPU module is in the RUN status.
• The file register cannot be switched to another by using the QDRSET instruction. ("OPERATION ERROR"
(error code: 4100))
• Set the refresh ranges for the following auto refresh properly so that each refresh range does not cross over
the boundary between the internal user device and the extended data register (D) or extended link register
(W).
• Set the following properly so that each specification does not cross over the boundary between the internal
user device and the extended data register (D) or extended link register (W).
*1 Block data means the following:
•Data used in instructions, such as FMOV, BMOV, and BK+, which treat more than one word for operation.
•Control data, composed of two or more words, which are specified in instructions, such as SP.FWRITE and
SP.FREAD.
•Data in a 32-bit or greater format (binary 32 bits, real number, indirect address of a device)
For details on the index modification and indirect specification with the extended data register (D) and extended link register
(W), refer to the following.
MELSEC-Q/L Programming Manual (Common Instruction)
• Number of program steps
• Instruction processing time
• Processing time of auto refresh with network modules
• Processing time of auto refresh with CC-Link IE Field Network Basic
• Processing time of auto refresh with intelligent function modules
• Processing time of auto refresh between CPU shared memories
• Auto refresh with network modules
• Auto refresh with CC-Link IE Field Network Basic
• Auto refresh with intelligent function modules
• Auto refresh between CPU shared memories
• Index modification
• Indirect specification
• Specification for instructions that use block data
*1
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