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4. CPU MODULE
4 CPU MODULE
4.1 Performance Specifications
Performance specifications of CPU modules are shown below.
*1 Each memory capacity for the programmable controllers is the sum total of the parameters, T/
C setting values, program capacities, file registers, comment points, sampling traces and
status latches. The memory capacities are unchanged. The extension memories cannot be
approved. For the calculation method of memory capacity, refer to Section 4.2.2.
*2 I/O devices of the actual number of I/O points or later can be used as the MELSECNET/10,
MELSECNET(II)/B, MELSECNET/MINI or CC-Link.
Performance specifications
Item
Model
Remark
Q02CPU-A Q02HCPU-A Q06HCPU-A
Control method Stored program repeat operation
I/O control mode Refresh mode
Partial direct I/O are
available by the
instructions.
Programming language
Language dedicated to sequence control
Relay symbol language, logic symbol language, MELSAP-II (SFC)
Processing speed (sequence instruction) 79ns/step 34ns/step
Constant scanning
(Program startup with a specified interval)
Can be set between 10ms and 190ms in 10ms units.
Set in special register
D9020.
Memory capacity
*1
144k bytes of built-in RAM + 144k bytes of built-in ROM
Program capacity
(steps)
Main sequence
program
Max. 28k steps Max. 30k steps
Set in parameters.
Sub sequence program None Max. 30k steps
Number of I/O device points
*2
8192 points (X/Y0 to X/Y1FFF)
The number of points
usable in the program
Number of I/O points
4096 points
(X/Y0 to X/YFFF)
The number of points
which can be used for
access to actual I/O
modules
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